2010
DOI: 10.1007/978-3-642-17653-1_23
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Cache-Aware Lock-Free Queues for Multiple Producers/Consumers and Weak Memory Consistency

Abstract: Abstract. A lock-free FIFO queue data structure is presented in this paper. The algorithm supports multiple producers and multiple consumers and weak memory models. It has been designed to be cache-aware and work directly on weak memory models. It utilizes the cache behavior in concert with lazy updates of shared data, and a dynamic lock-free memory management scheme to decrease unnecessary synchronization and increase performance. Experiments on an 8-way multi-core platform show significantly better performan… Show more

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Cited by 20 publications
(18 citation statements)
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References 10 publications
(31 reference statements)
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“…We re-implemented the Michael and Scotts queue (MSQ) on GPU by following the method proposed by Cederman et al Since our implementation achieves a better throughput, we use it as the comparison reference of GPU. We also use linked list concurrent ring queue (LCRQ) [11] and cacheaware lock-free queue (CAQ) [10] as representatives of CPU implementations. We evaluate the performance of CPU algorithms on an Intel(R) Xeon(R) E5-2620 microprocessor.…”
Section: Evaluation and Analysismentioning
confidence: 99%
See 1 more Smart Citation
“…We re-implemented the Michael and Scotts queue (MSQ) on GPU by following the method proposed by Cederman et al Since our implementation achieves a better throughput, we use it as the comparison reference of GPU. We also use linked list concurrent ring queue (LCRQ) [11] and cacheaware lock-free queue (CAQ) [10] as representatives of CPU implementations. We evaluate the performance of CPU algorithms on an Intel(R) Xeon(R) E5-2620 microprocessor.…”
Section: Evaluation and Analysismentioning
confidence: 99%
“…Hoffman et al [9] developed a basket linked list based approach. Gidenstam et al [10] presented a linkedlist of arrays as the container. Morrison and Afek [11] designed a new queue structure with fetch-and-add instead of CAS.…”
Section: Introductionmentioning
confidence: 99%
“…Also here, algorithms are parameterized with typical architectural features, and can thus be tuned to achieve a high degree of performance portability for the class of target architectures. Not mentioned here, algorithms and data structures for lock-free programming on CPUs and GPUs are needed and being developed in PEPPHER, both as application programmer components and for supporting the implementation of the run-time system, see, e.g., [10].…”
Section: Tunable Algorithms and Data Structures For Parallel Archimentioning
confidence: 99%
“…There are efficient concurrent implementations of a variety of common data structures, such as stacks [3], queues [4][5][6][7][8][9] and skip-lists [10]. For a good overview of several concurrent data structures we refer to the chapter by Cederman et al [11].…”
Section: Introductionmentioning
confidence: 99%