C‐band 180‐nm CMOS transmitter front‐end with a three‐stage power amplifier for phased array applications

Abstract

A fully differential transmitter front‐end with multistage power amplifiers and a 7‐bit phase shifter were implemented in a 180‐nm CMOS process. RC feedback and cross‐coupling circuits were adopted to improve the stability of the power amplifiers. For the final power stage, a four‐transistor in‐parallel architecture was used to obtain a large total gate width, while maintaining a compact size with relatively small parasitic effects. The measured saturated output power (Psat) of the fabricated transmitter chip is 21.3−22 dBm, with a system efficiency of 24%−28.2% at 5−7 GHz, and the root‐mean‐square phase and gain error are below 1.40° and 0.28 dB, respectively, with 7‐bit phase resolution.