BZK.SAU: Implementing a hardware and software-based Computer Architecture simulator for educational purpose

Öztekin, Halit; Temurtaş, Feyzullah; Gülbağ, Ali

doi:10.1109/iccda.2010.5541476

Cited by 13 publications

(12 citation statements)

References 11 publications

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“…Nikolic et al [7] surveyed and evaluated simulators suitable for teaching a computer architecture course. More recently, Oztekin et al [8] introduced yet another architecture simulator called BZK.SAU. With the rise in popularity and convenience of FPGAs, several papers adopt the technology in developing an architecture course.…”

Section: Related Workmentioning

confidence: 98%

Pipelined CPU Design With FPGA in Teaching Computer Architecture

Lee

et al. 2012

IEEE Trans. Educ.

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This paper presents a pipelined CPU design project with a field programmable gate array (FPGA) system in a computer architecture course. The class project is a five-stage pipelined 32-bit MIPS design with experiments on the Altera DE2 board. For proper scheduling, milestones were set every one or two weeks to help students complete the project on time. The goal of the project is to educate students effectively via hands-on learning, rather than having them achieve a complete and flawless CPU design. This study reveals that 21 MIPS instructions are enough to achieve the purpose. With the addition in 2010 of the properly enforced scheduling and the FPGA system, many more students successfully completed the class project than was the case in 2009. A student survey and the independent samples t-test reveal the effectiveness of the methodology with the FPGA system. This work differs from previous work in that the devised project requires the implementation of a real CPU instead of utilizing simulators or just experimenting with ready-made complete CPU models.Index Terms-Computer architecture, education, field programmable gate array (FPGA), hands-on learning, incremental learning, pipeline, problem-based learning (PBL).

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Section: Related Workmentioning

confidence: 98%

Pipelined CPU Design With FPGA in Teaching Computer Architecture

Lee

et al. 2012

IEEE Trans. Educ.

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“…A number of such tools are freely available and are in wide use [15,16]. Table 1 From the content viewpoint, ITC 161 and ITC 411 are technically aligned courses.…”

Section: Types Of Software-based Simulatorsmentioning

confidence: 99%

Using simulators for teaching computer organization and architecture

Prasad

Alsadoon

Beg

et al. 2015

Comp Applic In Engineering

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An important problem in teaching the subjects of Computer Architecture and Organization (CO&CA) is the linking of the theoretical knowledge with the practical experience. Visualization of different computer hardware architectures with the use of the simulators enhances the learning process among students. Many useful computer simulators can help address this issue by covering various aspects of CO&CA. The programs range from simple simulators to specific teaching tools to advanced and specialized software. We assessed several simulators and selected one that was freely available and that enabled the students to learn the concepts to the fullest. This paper describes our experience of incorporating simulation tools into teaching the CO&CA to information technology and computing students. We demonstrate that the use of simulators helped students understand better how a computer was constructed and how it functioned internally. ß 2015 Wiley Periodicals, Inc. Comput Appl Eng Educ 24:215-224, 2016; View this article online at wileyonlinelibrary.com/ journal/cae;

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“…BZK and SAU words are the acronym of Bozok and Sakarya University. We have adopted the modular approach to the second FPGA version of the BZK.SAU [9] named BZK.SAU.FPGA10.1 [10]. [8] and [9] have the same architecture.…”

Section: Related Workmentioning

confidence: 99%

FPGA-Based Flash Memory Controller for BZK.SAU.FPGA10.1 Microcomputer Architecture Design as an Educational Tool

Öztekin¹,

Temurtaş²,

Ölmez³

et al. 2012

IJCCE

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Operating systems and computer architecture and organization course are fundamental topics underlying many disciplines, including computer, electrical and electronics engineering departments. These courses involve both a theoretical and practical part for the effective learning process. A FPGA-based micro computer architecture design named BZK.SAU.FPGA10.1 was proposed to reinforce computer architecture and organization fundamentals in 2011. Also we developed an educational operating system named BZK.SAUOS from scratch on BZK.SAU.FPGA10.1 architecture. The program written using the user interface of this operating system was saved to main memory of this microcomputer architecture since it does not have a nonvolatile memory unit. So the process of editing on a file previously written is not impossible. This paper addresses an effective learning approach that permits one to work on real computer architecture and original operating system while supporting easily to save and edit their program using flash memory instead of main memory. The flash memory controller in this work have been designed completely hardware. So this controller allows the students to examine the internal structure of this controller while improving the motivation in the control of storage units like flash memory, hard disk etc. Overall, this work helps the students to improve controller design experience of storage units in low-level in addition to an increase in their learning process in the computer architecture and operating systems topics. Index Terms-BZK.SAU.FPGA, educational tool, memory controller, microcomputer architecture design, operating system. I. INTRODUCTION Operating systems and Computer architecture and organization courses are some of the main courses in the computer engineering and computer science. The effective learning process in these courses involves both a theoretical and practical part. There are several of designs and simulators in the open literature to improve the motivation in these courses. We also developed two FPGA-based microcomputer architecture designs named BZK.SAU.FPGA10.0 and BZK.SAU.FPGA10.1 in addition to literature. Then we designed an educational operating system named Manuscript

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BZK.SAU: Implementing a hardware and software-based Computer Architecture simulator for educational purpose

Cited by 13 publications

References 11 publications

Pipelined CPU Design With FPGA in Teaching Computer Architecture

Pipelined CPU Design With FPGA in Teaching Computer Architecture

Using simulators for teaching computer organization and architecture

FPGA-Based Flash Memory Controller for BZK.SAU.FPGA10.1 Microcomputer Architecture Design as an Educational Tool

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