Built-in current testing-feasibility study

Analog fault diagnosis based on ramping power supply current signature clusters

“…Hence, the supply current flowing through an ammeter will differ from one time point to the other. Equations for the bias current, I d d , for different regions of operations are well documented in the literature [22], [23]. The time dependency of the supply current can be defined as…”

Improvement of detectability for CMOS floating gate defects in supply current test

“…It is well known that there exist many floating gate defects which can not be always detected by functional test methods based on stuck-at fault models [1], [2]. It has also been shown that some of them cannot be detected even by Á É test method [1]- [4].…”

“…It has also been shown that some of them cannot be detected even by Á É test method [1]- [4]. It has therefore become an earnest request for test engineers to develop powerful test methods for such defects.…”

CMOS floating gate defect detection using I/sub DDQ/ test with DC power supply superposed by AC component

“…The open defects are further classified into stack-open ones and floating gate ones. The short defects and the stuck-open defects can be detected effectively by functional logic tests, so-called Á É tests [2], [3], etc. The floating gate defects however cannot always be detected owing to the following reason [3]- [6].…”