Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90nm technology

Sarafianos, Alexandre; Llido, R.; Dutertre, Jean-Max; Gagliano, Olivier; Serradeil, V.; Lisart, Mathieu; Goubier, V.; Tria, Assia; Pouget, Vincent; Lewis, Dean

doi:10.1016/j.microrel.2012.06.047

Cited by 17 publications

(12 citation statements)

References 3 publications

(2 reference statements)

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“…Using the electrical model introduced by Sarafianos et al in [9], [11], [12], they were able to validate their results on simulation basis: the obtained map of laser-sensitive areas is given in figure 7 for a laser pulse duration of 50 ns. This laser-sensitivity map matches the experimental results (see figure 6): no bit-flip faults were obtained (there is no overlap between bit-set and bit-reset areas, given in red and blue respectively), the fourth laser-sensitive area of transistor MP2 is also missing.…”

Section: A Simulation Resultsmentioning

confidence: 93%

“…They also came to the conclusion that the bit-set/bit-reset fault model is the relevant one as they did not obtain any bit-flip type fault. They also validated their results through simulation using the electrical model of transistors exposed to laser stimulation described in [9], [11], [12]. Finally, they obtained further validation of their results by performing fault injection experiments on the RAM memory of a microcontroller.…”

Section: Introductionmentioning

confidence: 75%

“…Our results are consistent with those of [10]: the bit-set/reset fault model is relevant to describe laser-fault injection in SRAMs. We then improved the simulation model presented in [9], [11], [12] by adapting it to picosecond range pulse durations. The new model fits correctly with our experimental results.…”

Section: Discussionmentioning

confidence: 99%

“…They introduced two different electrical models: one for short laser pulses and the other for long laser pulses (the threshold between short and long pulses was around one nanosecond). We chose another approach: using the electrical model already introduced by Sarafianos et al [9], [11], [12] for laser pulses in the nanosecond range. However, we changed several parameters of their model in order to take into account the laser pulse duration and our assumption of a reduced effect area for shorter laser pulses.…”

Section: Adaptation Of the Simulation Model To Picosecond Pulsesmentioning

confidence: 99%

“…For the sake of brevity we refer the reader to the corresponding bibliography [9], [11], [12] for a complete description of this electrical model. It is mostly built to take into account the laser-induced photocurrents.…”

Section: Adaptation Of the Simulation Model To Picosecond Pulsesmentioning

confidence: 99%

See 4 more Smart Citations

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses

Lacruche

Borrel

Champeix

et al. 2015

2015 IEEE 21st International on-Line Testing Symposium (IOLTS)

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Abstract-Laser fault injection into SRAM cells is a widely used technique to perform fault attacks. In previous works, Roscian and Sarafianos studied the relations between the layout of the cell, its different laser-sensitive areas and their associated fault model using 50 ns duration laser pulses. In this paper, we report similar experiments carried out using shorter laser pulses (30 ps duration instead of 50 ns). Laser-sensitive areas that did not appear at 50 ns were observed. Additionally, these experiments confirmed the validity of the bit-set/bit-reset fault model over the bit-flip one. We also propose an upgrade of the simulation model they used to take into account laser pulses in the picosecond range. Finally, we performed additional laser fault injection experiments on the RAM memory of a microcontroller to validate the previous results.

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Section: A Simulation Resultsmentioning

confidence: 93%

Section: Introductionmentioning

confidence: 75%

Section: Discussionmentioning

confidence: 99%

Section: Adaptation Of the Simulation Model To Picosecond Pulsesmentioning

confidence: 99%

Section: Adaptation Of the Simulation Model To Picosecond Pulsesmentioning

confidence: 99%

See 3 more Smart Citations

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses

Lacruche

Borrel

Champeix

et al. 2015

2015 IEEE 21st International on-Line Testing Symposium (IOLTS)

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In‐Volume Laser Direct Writing of Silicon—Challenges and Opportunities

Chambonneau

Grojo

Tokel

et al. 2021

Laser & Photonics Reviews

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Laser direct writing is a widely employed technique for 3D, contactless, and fast functionalization of dielectrics. Its success mainly originates from the utilization of ultrashort laser pulses, offering an incomparable degree of control on the produced material modifications. However, challenges remain for devising an equivalent technique in crystalline silicon which is the backbone material of the semiconductor industry. The physical mechanisms inhibiting sufficient energy deposition inside silicon with femtosecond laser pulses are reviewed in this article as well as the strategies established so far for bypassing these limitations. These solutions consisting of employing longer pulses (in the picosecond and nanosecond regime), femtosecond‐pulse trains, and surface‐seeded bulk modifications have allowed addressing numerous applications.

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Electrical modeling of the photoelectric effect induced by a pulsed laser applied to an SRAM cell

Sarafianos

Roscian

Dutertre

et al. 2013

Microelectronics Reliability

Self Cite

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International audienceThis abstract presents an electrical model of an SRAM cell exposed to a pulsed Photoelectrical Laser Stimulation (PLS), based on our past model of MOS transistor under laser illumination. The validity of our model is assessed by the very good correlation obtained between measurements and electrical simulation. These simulations are capable to explain some specific points. For example, in theory, a SRAM cell under PLS have four sensitive areas. But in measurements only three areas were revealed. A hypothesis was presented in this paper and confirm by electrical simulation. The specific topology of the cell masks one sensitive area. Therefore the electrical model could be used as a tool of characterization of a CMOS circuits under PLS

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Building the electrical model of the Photoelectric Laser Stimulation of a PMOS transistor in 90nm technology

Cited by 17 publications

References 3 publications

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses

Laser fault injection into SRAM cells: Picosecond versus nanosecond pulses

In‐Volume Laser Direct Writing of Silicon—Challenges and Opportunities

Electrical modeling of the photoelectric effect induced by a pulsed laser applied to an SRAM cell

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