Broadcast with mask on a massively parallel processing on a chip

Abstract

The delay of instructions broadcast has a significant impact on the performance of Single Instruction Multiple Data (SIMD) architecture. This is especially true for massively parallel processing Systems-on-Chip (mppSoC), where the processing stage and that of setting up the communication mechanism need several clock periods. Subnetting is the strategy used to partition a single physical network into more than one smaller logical sub-networks (subnets). This technique better controls the broadcast instructions domain and the data traffic between network nodes. Furthermore, it allows to separate synchronous communications from asynchronous processing which maintains reliable communications and rapid processing through parallel processors. This paper describes the design of a communication model called broadcast with mask. This model is dedicated to mppSoC architecture with a huge number of processor elements because it maintains performances even when the number of processors increases. Simulation results and an FPGA implementation validate our approach.

Master-Slave Control Structure for Massively Parallel System on Chip

“…It controls the local activity through the broadcast with mask mechanism [9]. Only activated SCUs receive instructions from the MCU while the others are in the idle state;…”

“…1) SCU-activity: The overhead due to the "mask" construction involves the time spent by the Control Unit in determining, which PEs should be enabled/disabled in the grid. To reduce the effects of this overhead, master-slave control achieves massively parallel masking operations in two steps using the broadcast with mask [9] mechanism through the SCU-activity module. First, it identifies active nodes according to a specific mask.…”