Broadband single-ended to differential signal converter embedded in silicon decision circuit

Analog Integr Circ Sig Process

Luzzi

Tommasino

et al. 2008

A novel circuit topology that provides wideband single-ended to differential conversion is presented. The proposed circuit exploits a negative feedback loop to generate a second input signal for a differential pair, thus obtaining 6 dB extra conversion gain and higher CMRR with respect to a simple differential pair driven singleended. A signal and noise model for the circuit is proposed, based on admittance parameters and the use of a novel analysis technique to open the feedback loop while maintaining closed loop loading effects. The model is exploited to derive design guidelines in bipolar and MOS technologies. Measurements on a test chip in STMicroelectronics BiCMOS7 technology are reported to compare the performance of the proposed topology and of a simple differential pair used as single-ended to differential converter

Section: Introductionmentioning

confidence: 99%

A wideband high-CMRR single-ended to differential converter

Analog Integr Circ Sig Process

Luzzi

Tommasino

et al. 2008

“…the operational amplifiers for lowfrequency analog signal processing, and circuits for wireless communication and optical digital telecommunication systems [1]- [7]. For instance, in the receiver chain of a digital optical communication system, a single-ended to differential converter is used to transform the unbalanced signal from the photodetector to a differential signal.…”

Section: Introductionmentioning

confidence: 99%

“…Some techniques have been introduced in order to increase the differential-mode gain, by applying a proper signal also at the second input of the differential pair. In [7] active feedback is used to drive the second input of the differential pair: a larger input differentialmode signal is obtained so that the effective differentialmode gain is increased.…”

Section: Introductionmentioning

confidence: 99%

“…Such topology allows about 6 dB of extra gain, and attenuation of the common mode signal with respect to a simple differential pair with a grounded input, due to a common mode feedback loop that is able to provide an out-of-phase signal at the second input of the cell. This topology is conceptually similar to the former in [7], but design constraints are more flexible. In fact, in [9] the loop used to provide the signal at the second input of the differential pair is completely independent of the main differential pair itself, thus allowing independent optimization of the two gains.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

An active balun for high-CMRR IC design

2005 European Microwave Conference

Luzzi

Marietti

et al. 2005

-A circuit topology that provides large bandwidth single-ended to differential conversion is presented. The proposed cell is based on a differential pair where feedback on common mode signal provides about 6 dB conversion gain increase, together with attenuation of common mode signal. Small-signal characterisation is presented, based on a block decomposition of the cell. Measurements on a SiGe test IC show more than 5 dB of gain improvement with respect to a simple differential pair.

“…This problem is particularly important at higher frequencies where the input signal typically comes from an antenna or a sensor and is naturally referred to ground, and in applications as filters, multipliers and frequency mixers. To this aim, a differential pair having one input terminal grounded can operate this conversion, but the symmetry of the output may not be guaranteed and the electrical characteristics can be affected by process variations on active devices [1][2][3][4][5][6].…”

Section: Introductionmentioning

confidence: 99%

A Novel Dual-Output CCII-Based Single-Ended to Differential Converter

Analog Integr Circ Sig Process

Diqual

Ferri

et al. 2005

In this paper a novel single-ended to differential converter topology, based on second generation current conveyors (CCIIs) is proposed. The converter architecture is very simple, being formed by a dual output currentconveyor (DOCCII) and three resistances which fix the gain of the circuit independently from the active block. Also the DOCCII topology is original, having the particular feature that output signals show a very little phase shifting between the two high impedance current outputs. The circuit has been implemented in a standard CMOS technology (AMS 0.35 µm), using a supply voltage of ±0.75 V. Theoretical values, circuit simulations and postlayout simulations are also shown and their good agreement confirms the validity of the presented idea.