Broad-spectrum light emission at microscopic breakdown sites in metal-insulator-silicon tunnel diodes

Abstract

In addition to Si band-edge electroluminescence ͑EL͒ near 1.1 eV, we observe hot-electron EL in metal-insulator-silicon tunnel diodes that can span a detector-limited range from 0.7 to 2.6 eV ͑1780-480 nm͒. The maximum photon energy increases with increasing forward bias. In one implementation, sub-micron-sized EL sites appear during the forward-bias stress. The number of sites grows linearly with the current, consistent with the dielectric breakdown of the insulator. We compare the poststress current-voltage data with the quantum-point-contact model. Results are presented for various p-type Si͑100͒ devices having 2-8-nm-thick SiO 2 , Al 2 O 3 , and HfO x N y insulators. We also describe devices in which electron-beam lithography of an 18-nm-thick SiO 2 is used to define EL sites.

A sub-wavelength Si LED integrated in a CMOS platform

“…Second, carrier recombination happens close to the bulk Si, which ✻✸ conducts heat effectively. Moreover, inspired by recent work on the emission associated with gate ✻✹ oxide breakdown, 35,36 the top contact is fabricated using gate poly-Si instead of metal. The contact ✻✺ is thus transparent and supports further scaling.…”

“…38 Similar methods were used to fabricate the contact of the gate poly-Si and the ✽✾ bulk Si substrate by Akil et al and Mihaychuk et al. 35,36 In our test, the substrate was biased at ✾✵ 6.0 V with the poly-Si grounded to introduce gate oxide breakdown. We observed that the current ✾✶ rapidly increased from pA to mA and was stabilized within 1 min.…”

“…This is in agreement ✶✶✻ with the reports on the emission from gate oxide breakdown. 35,36,[41][42][43] The broadening can be at-✶✶✼ tributed to the elevated temperature of the hot carriers accelerated by the electrical field in the Si ✶✶✽ filament. As the bias increases, the carrier temperature increases and so does the spectral FWHM ✶✶✾ of the emission.…”

A solution in 3 dimensions for current in a semiconductor under high level injection from a point contact

“…A single point breakdown device was fabricated by opening a 100 nm square window in a thick (20 nm) SiO 2 insulating layer on a 6 Ω•cm p-type silicon wafer. A thin SiO 2 layer (2 nm) was grown in this opening and an indium tin oxide top electrode was deposited on top of this [6]. The device was voltage stressed to create a hard breakdown.…”

A sub-wavelength Si LED integrated in a CMOS platform

“…Second, carrier recombination happens close to the Si substrate which conducts heat effectively. Moreover, inspired by the reports on the emission associated with gate oxide breakdown 35,36 , the top contact is fabricated using gate poly-Si instead of metal. The contact is thus transparent and supports further scaling.…”