Bottom-gated epitaxial graphene

Abstract

High-quality epitaxial graphene on silicon carbide (SiC) is today available in wafer size. Similar to exfoliated graphene, its charge carriers are governed by the Dirac-Weyl Hamiltonian and it shows excellent mobilities. For many experiments with graphene, in particular for surface science, a bottom gate is desirable. Commonly, exfoliated graphene flakes are placed on an oxidized silicon wafer that readily provides a bottom gate. However, this cannot be applied to epitaxial graphene as the SiC provides the source material out of which graphene grows. Here, we present a reliable scheme for the fabrication of bottom-gated epitaxial graphene devices, which is based on nitrogen (N) implantation into a SiC wafer and subsequent graphene growth. We demonstrate working devices in a broad temperature range from 6 to 300 K. Two gating regimes can be addressed, which opens a wide engineering space for tailored devices by controlling the doping of the gate structure.

Carbon nanomaterials field-effect-transistor-based biosensors

“…Because of the thickness of the intrinsic substrate on SiC, to achieve field effect responses, top gating of the epitaxial graphene is required in most cases except that based on nitrogen implantation into a SiC wafer before graphene growth. 76 Previous reports have proved that an efficient approach for top gating is 'solution top-gating' . Only very recently has the operation of graphene in aqueous electrolytes (Figure 6b) for use in biosensors and bioelectronics been reported by several groups.…”

Tuning carrier density across Dirac point in epitaxial graphene on SiC by corona discharge

“…13 A possible approach to carrier density control of SiC/G is the intercalation of gases such as hydrogen 14 or oxygen 15 at the graphene/SiC interface, with the further possibility to ionimplant a bottom gate. 16 However, these techniques suffer from instability under ambient or high temperature conditions and more importantly, suppress the SiC/G-substrate interaction limiting their use in quantum metrology applications. Other carrier density control methods, which preserve the graphene-SiC charge transfer, include chemical doping of graphene by non-covalent functionalization 17 and photochemical gating.…”

Epitaxial graphene as an electrode material: a transistor testbed for organic and all-carbon semiconductors

“…The validity of this approximation was previously conrmed. 16,17 In the second regime, when the drain voltage is equal or greater than the difference between gate and threshold voltage (V DS $ V GS À V T ), the current saturates due to the channel pinchoff and is given by:…”

“…This value is almost independent of the channel resistance R channel of each device, which is parametrically varied by V GS . This is expected as the monolayer graphene/SiC interface screens the gate effect of the bottom gate due to Fermi level pinning, 16,17 which is enforced by silicon dangling bonds underneath the graphene layer. Note that the P3HT on top of the graphene contact is consequently ungated.…”

“…In our case, we have created a conducting plane $1200 nm below the surface of a semi-insulating 6H-SiC wafer by implantation of dopants. 16,17 This serves as electrostatic gate with respect to the graphene plane at the wafer surface, because the SiC area in between acts as gate dielectric up to applied voltages of $100 V.…”