Bonding principles of passivation mechanism at III-V-oxide interfaces

Robertson, John; Lin, Liang

doi:10.1063/1.3665061

Cited by 63 publications

(28 citation statements)

References 23 publications

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“…1(c) and 1(d), there is no significant difference in C-V characteristics of the HfO 2 /InGaAs capacitors with the 2 and 5 cycle Al 2 O 3 inter-layers. These results indicate that the 2 cycle Al 2 O 3 inter-layer is enough to realize the good the HfO 2 /InGaAs MOS interface, which is in agreement with the theoretical result [74,75]. /InGaAs drastically reduced from 2 10 14 cm -2 eV -1 to 2 10 12 cm -2 eV -1 , which is as low as that of Al 2 O 3 /InGaAs.…”

Section: Iii-v Gate Stack Technologiessupporting

confidence: 91%

“…It should be noted here that the 2 cycle Al 2 O 3 layer (2.2 Å), less than one monolayer, is passivating 58 % of an InGaAs surface, because the monolayer thickness of Al 2 O 3 is 3.8 Å [76]. This result agrees with the theoretical prediction [74,75] that, when a trivalent oxide like Al 2 O 3 covers 50% or more of GaAs surface bonds, the HfO 2 /GaAs interface can be effectively passivated. In order to reduce EOT with maintaining the good interface properties, we fabricated capacitors with thin HfO 2 (2, 3 and 6 nm) using the HfO 2 /Al 2 O 3 (2 cycle)/InGaAs gate stacks.…”

Section: Iii-v Gate Stack Technologiessupporting

confidence: 88%

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(Invited) MOS Interface Control of High Mobility Channel Materials for Realizing Ultrathin EOT Gate Stacks

et al. 2013

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One of the most critical issues for Ge/III-V MOSFETs, which have been regarded as a promising CMOS structure under sub 10 nm regime, is gate insulator formation satisfying the requirements of MOS interface quality and thin equivalent oxide thickness (EOT). In this paper, we focus on viable gate stack technologies realizing these requirements. As for Ge gate stacks, we present a ultrathin EOT Al 2 O 3 /GeO x /Ge gate stack fabricated by a plasma post oxidation method and pMOSFETs using this gate stack. The GeO x /Ge MOS interface properties are systemically examined, and the relations of the interface state density (D it ) with the GeO x thickness and the chemical conditions are studied. (100) Ge pMOSFETs using this gate stack is demonstrated with EOT down to 0.98 nm and high hole peak mobility of 401 cm 2 /Vs. As for InGaAs gate stacks, we show the impact of Al 2 O 3 inter-layers on interface properties of HfO 2 /InGaAs MOS interfaces. It is found that the insertion of 0.2-nm-thick ultrathin Al 2 O 3 inter-layer can effectively improve the HfO 2 /InGaAs interface properties such as the frequency dispersion and the stretch-out of C-V characteristics and D it . The 1-nm-thick capacitance equivalent thickness (CET) in the HfO 2 /Al 2 O 3 /InGaAs MOS capacitors is realized with good interface properties and low gate leakage of 2.4×10 -2 A/cm 2 .

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Section: Iii-v Gate Stack Technologiessupporting

confidence: 91%

Section: Iii-v Gate Stack Technologiessupporting

confidence: 88%

(Invited) MOS Interface Control of High Mobility Channel Materials for Realizing Ultrathin EOT Gate Stacks

et al. 2013

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“…The paper will focus on the case of the Al 2 O 3 /In 0.53 Ga 0.47 As MOS system, as experimental results [23], [24], supported by theoretical calculations [34] indicate that Al 2 O 3 reduces the concentration of electrically active states at the oxide/In 0.53 Ga 0.47 As interface. Moreover, the process of forming Al 2 O 3 on the In 0.53 Ga 0.47 As surface using trimethylaluminum (TMA) [Al(CH 3 ) 3 ] and H 2 O results in a reduction of the native oxides on the In 0.53 Ga 0.47 As surface [15] through a process of ligand exchange [35].…”

Section: Introductionmentioning

confidence: 97%

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

Hurley

O’Connor

Djara

et al. 2013

IEEE Trans. Device Mater. Relib.

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In this paper, we present a review of experimental results examining charged defect components in the Al 2 O 3 / In 0.53 Ga 0.47 As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al 2 O 3 thickness series (10-20 nm) for the n-and p-type In 0.53 Ga 0.47 As layers, the analysis reveals a positive fixed charge density (∼ 9 × 10 18 cm −3 ) distributed throughout the Al 2 O 3 and a negative sheet charge density (−8 × 10 12 cm −2 ) located near the Al 2 O 3 /In 0.53 Ga 0.47 As interface. The interface state density integrated across the energy gap is ∼1 × 10 13 cm −2 and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5% H 2 /95%N 2 ambient at 350 • C for 30 minutes) annealing. The interface state distribution obtained from multifrequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In 0.53 Ga 0.47 As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In 0.53 Ga 0.47 As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures. Finally, this Manuscript paper reviews recent work based on an optimization of the In 0.53 Ga 0.47 As surface preparation using (NH 4 ) 2 S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al 2 O 3 , which indicates interface state reduction (< 10 12 cm −2 eV −1 ) and genuine surface inversion for both n-and p-type Al 2 O 3 /In 0.53 Ga 0.47 As MOS structures.

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“…22 Since Al and Ga carry the same ionic charge, this construction satisfies the electron counting rule. 23 The actual model structure consists of GaAs/Al 2 O 3 in a superlattice geometry in which 1 Â 2 Â 1 unit cells of j-Al 2 O 3 (011) are attached to 2 Â 2 Â 2 cubic unit cells of GaAs(001).…”

mentioning

confidence: 99%

Accurate determination of charge transition levels of the As-As dimer defect at GaAs/oxide interfaces through hybrid functionals

Miceli

Pasquarello

2013

Applied Physics Letters

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The energy levels of the As-As dimer defect at GaAs/oxide interfaces are accurately determined within a hybrid functional scheme and aligned with respect to the GaAs band gap. An As-As dimer is constructed at a model interface between GaAs and κ-Al2O3, which satisfies electron counting rules. The defect is studied through its charge transition levels which account for structural relaxation upon charging and which can directly be compared to measured defect energies. The antibonding state of the As-As dimer is found to lie at 0.30 eV below the conduction-band edge, in good correspondence with experimentally observed defect states.

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Bonding principles of passivation mechanism at III-V-oxide interfaces

Cited by 63 publications

References 23 publications

(Invited) MOS Interface Control of High Mobility Channel Materials for Realizing Ultrathin EOT Gate Stacks

(Invited) MOS Interface Control of High Mobility Channel Materials for Realizing Ultrathin EOT Gate Stacks

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the $\hbox{Al}_{2}\hbox{O}_{3}/ \hbox{InGaAs}$ MOS System

Accurate determination of charge transition levels of the As-As dimer defect at GaAs/oxide interfaces through hybrid functionals

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