Block save addition with threshold logic

Signed digit addition and related operations with threshold logic

“…First, we prove that multioperand addition can be achieved by a depth-P network with yn Q size, yn Q weights, and yn P fan-in complexities. It must be noted that the proposed network performs an n operand to one result reduction in depth-P, not an n operand to two reduction in depth-P as previously proposed schemes [15], [29] do. Subsequently, we show that the multiplication (that is, the generation of the partial products and the matrix reduction into one row representing the product) can be achieved with a depth-Q network with yn Q size, yn Q weights, and yn P log n fan-in complexities.…”

“…Threshold networks for multioperand addition and multiplication of n-bit binary operands have been reported [14], [15], [26], [29]. Generally speaking, multioperand addition and multiplication can be achieved in two steps, namely: First, reduce a multioperand addition (in multiplication, such addition is required for the reduction of the partial product matrix) into two rows; second, add the two rows to produce the final result.…”

“…For such a scheme and nonredundant representations, the following has been suggested: . The reduction of the multioperand addition (or the reduction of multiplication partial product matrix) into two rows can be achieved by depth-P networks with the cost of the network, in terms of LTGs, in the order of yn P and a maximum fan-in in the order of yn log n, see, for example, [15], [29]. .…”

“…The quantities d ÀI À i and I i in (33), (34) can be computed by doing the proper substitutions, using (26), (27), (28), (29), as: constructed with IIn TGs. For the digit position n À I, we have to produce the carry-out.…”

“…A formal proof of Lemma 1 and implementation examples can be found in [26]. Given that we assume SD operands (that is, we consider functions with no Boolean input variables), we need to map them into general Boolean functions.…”