An architecture based on parallel statistical sampler with digital post-processing is proposed to provide graceful performance degradation of data acquisition under a multiple failure scenario. After a self-configuration stage, an adaptive procedure keeps track of parametric variations on the signal path during operation and corrects the digital modeling block. Parametric faults are thus detected and their impact on the system behavior is minimized. The low-cost of the basic analog building block allow the inherent redundancy and the parallel reconstruction model of the architecture to bear faults with decreased dynamic performance. Analysis of the architecture and the digital modeling employed is presented, as well as measurements data to validate de feasibility of the approach.