Bit-stream implementation of a phase-locked loop

Bradshaw, Jonathan; Madawala, Udaya K.; Patel, Nitish

doi:10.1049/iet-pel.2010.0009

Cited by 5 publications

(4 citation statements)

References 25 publications

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“…Other methods estimate the harmonics and then subtract them from the grid signal [6]. These methods increase the computation complexity of the PLL and slow down its response [4]. In this part, a method is proposed to remove the harmonics effect without adding complexity or affecting its response time.…”

Section: Modification For Harmonics Eliminationmentioning

confidence: 99%

“…RESs need be controlled by efficient and effective control algorithms [3]. One fundamental function required by the RESs is to keep track of the grid phase which is obtained using phase locked‐loop (PLL) [4]. The objective of the PLL is to extract the amplitude, phase and/or frequency of the grid from the instantaneous measurements of its voltage [5].…”

Section: Introductionmentioning

confidence: 99%

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Robust phase locked‐loop algorithm for single‐phase utility‐interactive inverters

Elrayyah

Sözer

Elbuluk

2014

IET Power Electronics

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An accurate, robust and efficient transport-delay based phase-lock loop (TDPLL) algorithm is proposed for single phase utility interactive inverters. The traditional TDPLL has low complexity and its transient response is smooth, but its performance is significantly affected by the change in the grid frequency. The proposed TDPLL is designed to have robustness against grid frequency variations. The proposed method uses two delays instead of one to cancel the grid frequency variation effect. Since the grid voltage could be polluted by harmonics and may suffer from sag/swell anomalies, the proposed method is enhanced further to be robust against these sources of disturbances. Moreover, a method is proposed to tune the parameters of the system. The performance of the proposed PLL is validated through simulations and experimental results.

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Section: Modification For Harmonics Eliminationmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Robust phase locked‐loop algorithm for single‐phase utility‐interactive inverters

Elrayyah

Sözer

Elbuluk

2014

IET Power Electronics

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“…2. The control block diagram consists of phase‐locked loop (PLL) [13, 14], PCI, PLC and current control. Detailed explanations are as follows.…”

Section: Principles Of Operationmentioning

confidence: 99%

Active anti‐islanding detection based on pulse current injection for distributed generation systems

Hou

Chen

2013

IET Power Electronics

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This study proposes an active anti-islanding detection using an adjustable pulse current for distributed generation systems. The pulse current injection is utilised to find out difference voltage response between utility systems and islanding operation systems within 2.8 ms, which is faster than conventional current injection methods. Furthermore, the power line communication is utilised to keep islanding detection system with accuracy. Finally, the performances of the proposed scheme are validated by simulation and test results.

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“…The design of the PLL is discussed in [22,23] and is a compromise between speed and noise immunity. A discrete bit-stream PLL implementation is discussed in [24].…”

Section: Grid Phase Trackingmentioning

confidence: 99%

FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter

Ekström

Leijon

2013

Journal of Control Science and Engineering

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The full control system of a grid-connected current-controlled voltage-source inverter (CC-VSI) has been designed and implemented on a field-programmable gate array (FPGA). Various control functions and implementation methods are described and discussed. The practical viability of the system is evaluated in an experimental setup, where a VSI supplies 30 kW into the local grid at 400 V. A phase-locked loop (PLL) is used for grid phase tracking and evaluated for simulated abnormal grid conditions. Power factor is kept at unity, and the implemented control system is stressed with step responses in the supplied active power. A moving-average filter is implemented to reduce the effects of noise and harmonics on the current control loops. A coupling between active and reactive power flow is observed for the step responses but may be ignored in this context. The proposed system is fully comparable with more conventional microprocessor-based control systems.

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Bit-stream implementation of a phase-locked loop

Cited by 5 publications

References 25 publications

Robust phase locked‐loop algorithm for single‐phase utility‐interactive inverters

Robust phase locked‐loop algorithm for single‐phase utility‐interactive inverters

Active anti‐islanding detection based on pulse current injection for distributed generation systems

FPGA Control Implementation of a Grid-Connected Current-Controlled Voltage-Source Inverter

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