Bit-serial multiplication in GF(2m) using irreducible all-one polynomials

A novel approach for bit-serial AB2 multiplication in finite fields GF(2m)

“…The authors would like to thank the anonymous referees for their valuable suggestions on how to improve the quality of the manuscript. LFSR architecture [10]. These algorithms and architectures have the features of modularity and low complexity but they still need improving with regard to time and space.…”

“…A numbers of studies have presented efficient architectures with algorithms for multiplication based on irreducible AOPs [8][9][10]. Koc proposed bit-parallel AB multipliers based on a canonical basis [8].…”

“…A one-dimensional linear feedback shift register (LFSR) is well matched to such criteria, and it has already been applied to many areas [10,11].…”

FPGA Realization of Low Register Systolic All-One-Polynomial Multipliers Over $GF(2^{m})$ and Their Applications in Trinomial Multipliers

“…Due to security reasons, AOPs are usually not preferred for cryptosystem implementations though the AOP-based multipliers are quite simple and regular, while trinomial-based multipliers are more popular than AOP-based ones, as two trinomials have been recommended by the National Institute of Standards and Technology (NIST) for ECC implementation [5]. However, because of the complexity differences, AOPs and trinomials usually are not considered together in practical field multiplication implementations [18].…”

“…All-one-polynomials (AOP)s and trinomials are two of the important irreducible polynomials being used [7][8][9][10][11], [17][18][19][20][21][22][23][24][25][26][27]. Due to security reasons, AOPs are usually not preferred for cryptosystem implementations though the AOP-based multipliers are quite simple and regular, while trinomial-based multipliers are more popular than AOP-based ones, as two trinomials have been recommended by the National Institute of Standards and Technology (NIST) for ECC implementation [5].…”