Bit-Level Optimization of Shift-and-Add Based FIR Filters

Techniques for avoiding sign-extension in multiple constant multiplication

“…If the actual filter coefficient is negative one can replace the structural addition with a subtraction. However, from an implementation point of view it sometimes beneficial to realize the negative version as it remove all half-adders otherwise required for the LSB side of a subtraction [16]. This is illustrated in Fig.…”

“…In [16] the authors propose a method to rearrange the interconnection of the multiplier block to reduce the number of full and half adder 1 As the complexity of adders and subtracters are similar, we will refer to both as adders. cells required.…”

Estimation of the switching activity in shift-and-add based computations

“…Note that the required number of full adders normally is lower than W i , since the shifted bit positions in most cases may be passed by directly [14], [15]. The task of MCM algorithms is to find a set of extra fundamentals so that all coefficients are realized.…”

Switching activity estimation for shift-and-add based constant multipliers

“…However, the number of adders is often not proportional to the power consumption [6]. It is therefore of interest to determine accurate high level models for the power consumption to be used in MCM algorithms, aiming at selecting extra fundamentals that will result in a low power implementation.…”

“…However, the switching activities for a carry bit c i and a sum bit s i can be obtained directly from the transition switching activities by (6) This model assumes that the two signals to be added are uncorrelated. However, in a multiplier block all signals are correlated as they origin from the same input.…”