Bipolar Conduction in Tin-Oxide Semiconductor Channel Treated by Oxygen Plasma for Low-Power Thin-Film Transistor Application

Chen, Po-Chun; Wu, Yung-Hsien; Zheng, Zhiwei; Chiu, Yu-Chien; Cheng, Chien‐Hong; Yen, Shiang-Shiou; Hsu, Hsiao‐Hsuan; Chang, Chun–Yen

doi:10.1109/jdt.2015.2457439

Cited by 14 publications

(3 citation statements)

References 15 publications

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“…It was obviously observed that the SnO x TFT device without the oxygen plasma treatment on the channel exhibited p-type conduction. However, after applying the oxygen plasma treatment on the channel, the TFT device showed n-type conduction, which can be ascribed to the excess oxygen incorporated to the channel and converted oxygen-deficient p-type SnO x (Sn 2+ preferred) to oxygen-rich n-type SnO x (Sn 4+ preferred) [11]. For the TFT device characteristics, I on /I off can be obtained from the I D − V G curve and μ FE can be extracted from a gradual channel approximation in the linear region according to the equation [19]: where C G is the gate insulator capacitance per unit.…”

Section: Methodsmentioning

confidence: 99%

Performance Investigation of an n-Type Tin-Oxide Thin Film Transistor by Channel Plasma Processing

Shang

Liu

et al. 2020

IEEE J. Electron Devices Soc.

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In this paper, we investigated the performance of an n-type tin-oxide (SnO x) thin film transistor (TFT) by experiments and simulation. The fabricated SnO x TFT device by oxygen plasma treatment on the channel exhibited n-type conduction with an on/off current ratio of 4.4x10 4 , a high field-effect mobility of 18.5 cm 2 /V.s and a threshold swing of 405 mV/decade, which could be attributed to the excess reacted oxygen incorporated to the channel to form the oxygen-rich n-type SnO x. Furthermore, a TCAD simulation based on the n-type SnO x TFT device was performed by fitting the experimental data to investigate the effect of the channel traps on the device performance, indicating that performance enhancements were further achieved by suppressing the density of channel traps. In addition, the n-type SnO x TFT device exhibited high stability upon illumination with visible light. The results show that the n-type SnO x TFT device by channel plasma processing has considerable potential for next-generation high-performance display application. INDEX TERMS Thin film transistor (TFT), tin-oxide (SnO x), plasma, TCAD.

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Section: Methodsmentioning

confidence: 99%

Performance Investigation of an n-Type Tin-Oxide Thin Film Transistor by Channel Plasma Processing

Shang

Liu

et al. 2020

IEEE J. Electron Devices Soc.

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“…Due to the breaking of weak bonds between metal and oxide, a large concentration of carrier trap centers was created, which is one reason for the inferior performance of p-type oxide TFT [14,15]. As compared to other oxide semiconductors, SnO has been considered as the right candidate for p-type semiconductors because of Sn 5s orbitals spread spatially at the top of valence band maxima leads to a high mobility hole transport path [16][17][18][19][20][21][22][23]. However, some critical issues, including low I on /I off ratio, high subthreshold swing (SS), and insufficient control over process stability, need to be addressed for further performance enhancement.…”

Section: Introductionmentioning

confidence: 99%

Microwave and furnace annealing in oxygen ambient for performance enhancement of p-type SnO thin-film transistors

Mohanty¹,

Wu²,

Chang³

et al. 2021

Semicond. Sci. Technol.

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In this study, we investigated the effect of microwave-irradiation annealing (MWA) and thermal furnace annealing (FA) in oxygen ambient on the active channel layer of p-type tin-oxide (SnO) thin-film transistors. At very low source-drain voltage of −0.1 V, the MWA at 1200 W and FA at 300 °C samples have exhibited significant improvement in the electrical characteristics such as subthreshold swing (SS) of 0.93 and 0.485 V dec−1, the I on/I off ratio of 1.65 × 104 and 3.07 × 104, the field-effect mobility (μ FE) of 0.16 and 0.26 cm2 V−1 s and ultra-low off-state current of 1.9 and 2.0 pA respectively. The observed performance enhancement was mainly attributed to the reduction of interface trap density (N t) by tuning the power of MWA and optimizing the temperature in FA. From the result, we observed the optical band gap (E g) increased by 6% in FA, and 12% in MWA, which confirms improved crystallinity and reduction of defect states. Additionally, a low thermal budget microwave anneal process has shown high transmittance of more than 86% in the visible region (380–700 nm). The physical characterization indicates the partial phase transformation of SnO to SnO2 with retaining p-type conductivity in both annealing processes. The results demonstrate that both the annealing process could be highly promising to be used in the complementary logic circuits of new generation flexible/transparent displays.

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“…Such as high-k/metal-gate technology can reduce the equivalent oxide thickness (EOT) to suppress the direct tunneling current in gate oxides. [1][2][3][4][5][6][7] Using strained silicon can enhance the mobility, resulting in better chip performance and lower energy consumption. 8 Furthermore, the 3D architecture, such as Gate-All-Around (GAA) FETs has been widely investigated and reported to reducing short channel effect (SCE).…”

mentioning

confidence: 99%

Improved Thermal Stability and Stress Immunity in Highly Scalable Junctionless FETs Using Enhanced-Depletion Channels

Liu¹,

Cheng

Lin³

et al. 2018

ECS J. Solid State Sci. Technol.

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In this work, we report a novel multi-PNPN-channel junctionless transistor with short channel length of 60nm. The multi-PNPN junctionless transistor exhibits the larger drive current of >1μA/μm, the steeper turn-on switching of 77 mV/decade, and the higher on/off current ratio of >10 7 than the hybrid PN channel device under the same gate overdrive. The improved performance is mainly attributed to the enhanced depletion effect of multi-PNPN channel to optimize the electric field modification of surface p-channel. The stronger immunity to constant-voltage stress is also obtained for multi-PNPN channel due to the lower lateral electric field near drain side to reduce the impact ionization ratio.

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Bipolar Conduction in Tin-Oxide Semiconductor Channel Treated by Oxygen Plasma for Low-Power Thin-Film Transistor Application

Cited by 14 publications

References 15 publications

Performance Investigation of an n-Type Tin-Oxide Thin Film Transistor by Channel Plasma Processing

Performance Investigation of an n-Type Tin-Oxide Thin Film Transistor by Channel Plasma Processing

Microwave and furnace annealing in oxygen ambient for performance enhancement of p-type SnO thin-film transistors

Improved Thermal Stability and Stress Immunity in Highly Scalable Junctionless FETs Using Enhanced-Depletion Channels

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