Binary multiplication with PN sequences

Gupta, Prachi; Kumaresan, R.

doi:10.1109/29.1564

Cited by 66 publications

(25 citation statements)

References 5 publications

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“…Surprisingly, LFSRs can be used to generate stochastic numbers that are, in certain cases, guaranteed to be exact. This was demonstrated for multiplication by Gupta and Kumaresan [1988] who introduced a new type of SNG that we call a weighted binary SNG. Figure 5 shows a 4-bit version, which converts a 4-bit binary number x to a stochastic numberx of length 16.…”

Section: Accuracy Issuesmentioning

confidence: 93%

“…6. Accurate four-bit stochastic multiplier of the type proposed by Gupta and Kumaresan [1988]. [Singhee and Rutenbar 2009].…”

Section: Accuracy Issuesmentioning

confidence: 99%

“…SC research has focused on a narrow range of specialized applications, such as neural networks, [Brown and Card 2001;Kim and Shanblatt 1995], control circuits [Marin et al 2002;Toral et al 1999], and reliability calculations [Aliee and Zarandi 2011;Chen and Han 2010]. There were, however, some important theoretical discoveries [Gupta and Kumaresan 1988;Jeavons et al 1994] relating to stochastic number generation that have attracted little attention, but nevertheless have positive implications for SC, as we explain in Section 3.…”

Section: Introductionmentioning

confidence: 95%

See 2 more Smart Citations

Survey of Stochastic Computing

Alaghi

Hayes

2013

ACM Trans. Embed. Comput. Syst.

451

307

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Stochastic computing (SC) was proposed in the 1960s as a low-cost alternative to conventional binary computing. It is unique in that it represents and processes information in the form of digitized probabilities. SC employs very low-complexity arithmetic units which was a primary design concern in the past. Despite this advantage and also its inherent error tolerance, SC was seen as impractical because of very long computation times and relatively low accuracy. However, current technology trends tend to increase uncertainty in circuit behavior and imply a need to better understand, and perhaps exploit, probability in computation. This article surveys SC from a modern perspective where the small size, error resilience, and probabilistic features of SC may compete successfully with conventional methodologies in certain applications. First, we survey the literature and review the key concepts of stochastic number representation and circuit structure. We then describe the design of SC-based circuits and evaluate their advantages and disadvantages. Finally, we give examples of the potential applications of SC and discuss some practical problems that are yet to be solved.

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Section: Accuracy Issuesmentioning

confidence: 93%

“…6. Accurate four-bit stochastic multiplier of the type proposed by Gupta and Kumaresan [1988]. [Singhee and Rutenbar 2009].…”

Section: Accuracy Issuesmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 95%

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Survey of Stochastic Computing

Alaghi

Hayes

2013

ACM Trans. Embed. Comput. Syst.

451

307

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“…The cost of doing this is that two input streams represented in this manner cannot be combined using the simple probability rules that assume independence, because the value streams are not random. For some special cases, deterministic 0/1 sequences have been developed with simple combination rules [12].…”

Section: Deterministic 0/1 Encodingmentioning

confidence: 99%

Comparing Stochastic and Deterministic Computing

Manohar

2015

IEEE Comput. Arch. Lett.

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Technology scaling has raised the specter of myriads of cheap, but unreliable and/or stochastic devices that must be creatively combined to create a reliable computing system. This has renewed the interest in computing that exploits stochasticity-embracing, not combating the device physics. If a stochastic representation is used to implement a programmable general-purpose architecture akin to CPUs, GPUs, or FPGAs, the preponderance of evidence indicates that most of the system energy will be expended in communication and storage as opposed to computation. This paper presents an analytical treatment of the benefits and drawbacks of adopting a stochastic approach by examining the cost of representing a value. We show both scaling laws and costs for low precision representations. We also analyze the cost of multiplication implemented using stochastic versus deterministic approaches, since multiplication is the prototypical inexpensive stochastic operation. We show that the deterministic approach compares favorably to the stochastic approach when holding precision and reliability constant.

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“…This causes inaccuracy in the output generated, so SNGs are always chosen in such a way that they produce uncorrelated SNs. LFSRs are known to be best-suited for SC and have been used for number generation in many SC designs [21]. However, the main disadvantages are the number of SNGs must be higher (i.e., for every independent input, the number of SNGs used increases by one) for uncorrelated inputs and need a longer time to operate for accurate and efficient SC [19].…”

mentioning

confidence: 99%

Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

Seva

Metku

Choi

2017

JLPEA

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Abstract:The high performance of FPGA (Field Programmable Gate Array) in image processing applications is justified by its flexible reconfigurability, its inherent parallel nature and the availability of a large amount of internal memories. Lately, the Stochastic Computing (SC) paradigm has been found to be significantly advantageous in certain application domains including image processing because of its lower hardware complexity and power consumption. However, its viability is deemed to be limited due to its serial bitstream processing and excessive run-time requirement for convergence. To address these issues, a novel approach is proposed in this work where an energy-efficient implementation of SC is accomplished by introducing fast-converging Quasi-Stochastic Number Generators (QSNGs) and parallel stochastic bitstream processing, which are well suited to leverage FPGA's reconfigurability and abundant internal memory resources. the proposed approach has been tested on the Virtex-4 FPGA, and results have been compared with the serial and parallel implementations of conventional stochastic computation using the well-known SC edge detection and multiplication circuits. Results prove that by using this approach, execution time, as well as the power consumption are decreased by a factor of 3.5 and 4.5 for the edge detection circuit and multiplication circuit, respectively.

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Binary multiplication with PN sequences

Cited by 66 publications

References 5 publications

Survey of Stochastic Computing

Survey of Stochastic Computing

Comparing Stochastic and Deterministic Computing

Energy-Efficient FPGA-Based Parallel Quasi-Stochastic Computing

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