BIMOS transistor and its applications in ESD protection in advanced CMOS technology

ESD characterization of multi-finger RF nMOSFET transistors by TLP and transient interferometric mapping technique

“…This effect is attributed to the channel opening by the gate coupling effect via gate to source (C gs ) and gate to drain (C gd ) overlap capacitances similar to e.g. [7], see Fig. 3.…”

Symmetrical ESD trigger and pull-up using BIMOS transistor in advanced CMOS technology

“…The circuit acts like a ''zener'' diode where Vz is adjusted by the resistor value. This solution leads to a dynamic and a quasi-static ESD detection [2,4]. It is clear that the initial design solution does not provide a symmetrical ESD response and no pull-up.…”