Bias Current Generators with Wide Dynamic Range

Abstract

Mixed-signal or analog chips often require a wide range of biasing currents that are independent of process and supply voltage and that are proportional to absolute temperature. This paper describes CMOS circuits that we use to generate a set of fixed bias currents typically spanning six decades at room temperature down to a few times the transistor off-current. A bootstrapped current reference with a new startup and powercontrol mechanism generates a master current, which is successively divided by a current splitter to generate the desired reference currents. These references are nondestructively copied to form the chip's biases. Measurements of behavior, including temperature effects from 1.6 and 0.35 µ implementations, are presented and nonidealities are investigated. Temperature dependence of the transistor off-current is investigated because it determines the lower limit for generated currents. Readers are directed to a design kit that allows easy generation of the complete layout for a bias generator with a set of desired currents for scalable MOSIS CMOS processes.

Neuromorphic Electronic Circuits for Building Autonomous Cognitive Systems

“…In addition, the approach of building distributed multi-chip systems interfaced among each other via the AER protocol (e.g., see Section VI-B), lends itself well to the adoption of event-based mismatch reduction techniques, such as the one proposed in [136], that can be effective even for very large-scale systems, (e.g., comprising 1 million silicon neurons) [145]. In addition to being useful for compensating mismatch effects across neurons, homeostatic synaptic scaling circuits, such as the ones described in Section IV-C, can provide another approach to compensating the effects of temperature drifts, complementing dedicated sub-threshold bias generator approaches [146], [147]. In summary, this neuromorphic approach makes it possible to tolerate noise, temperature, and mismatch effects at the single device level by exploiting the adaptive features of the circuits and architectures designed, leading to robustness at the system level.…”

A Mixed-Signal VLSI System for Producing Temporally Adapting Intraspinal Microstimulation Patterns for Locomotion

“…A bias current reference circuit was split and mirrored to each stimulation output slice [41]. This bias reference circuit was used due to its small layout area and low power requirements.…”

A picoampere A/D converter for biosensor applications

“…For our proposed ADC, the reference current may be generated on-chip with high accuracy, and may be calibrated against off-chip reference currents where necessary. For example, the bias current generator presented in [36] can be used to generate accurate reference currents as long as the temperature does not vary significantly. The circuit includes three sections: a kickstart & power down section, a master bias section, and a current splitter section.…”

“…The master bias section generates a bias current that is proportional to the absolute temperature T : $$I_m=log(M)\frac{U_T}{R},U_T=\frac{kT}{q}$$ where U T is the thermal voltage. The resistor R was an off-chip resistor in [36] for flexibility but an on-chip resistor is more accurate.…”