Beyond SiO2 technology: Simulation of the impact of high-κ dielectrics on mobility

Ferrari, Giulio; Watling, J.R.; Roy, S.; Barker, John R.; Asenov, A.

doi:10.1016/j.jnoncrysol.2006.10.044

Cited by 9 publications

(4 citation statements)

References 26 publications

(24 reference statements)

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“…However, a vast tunneling current arises and power dissipation becomes significantly high when the gate oxide thickness is less than 1.5 nm [3]. In order to solve these problems, it is needed a high-κ dielectric with equivalent electrical oxide thickness but higher physical thicknesses to replace SiO 2 [4][5][6][7]. Since having good dielectric properties and good thermal stability on silicon substrates, Hf-based silicates are the promising candidate to replace SiO 2 compared to other high-κ materials [8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

et al. 2012

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Kata kunci: arus terobosan, kecepatan gerbang, massa anisotropik, material berkonstanta dielektrik tinggi, metode transfer matriks. Abstract In this paper, we have developed a model of the tunneling current through a high-dielectric IntroductionIt is known that silicon-based metal-oxide-semiconductor field-effect transistors (MOSFETs) are aggressively scaled down to the sub-micrometer regime and below for emerging applications required higher speed, higher density and lower voltage operation [1][2]. In order to fulfill these aims, it is required a thinner SiO 2 gate oxide. However, a vast tunneling current arises and power dissipation becomes significantly high when the gate oxide thickness is less than 1.5 nm [3]. In order to solve these problems, it is needed a high-κ dielectric with equivalent electrical oxide thickness but higher physical thicknesses to replace SiO 2 such as [4][5][6][7]. Since having good dielectric properties and good thermal stability on silicon substrates, Hf-based silicates are the promising candidate to replace SiO 2 compared to other high-κ materials [8][9][10]. The gate oxides anticipated to substitute SiO 2 are a stack of an ultrathin SiO 2 and a high-κ layer, which is known as a high-κ gate stack, because an ultrathin SiO 2 often grows during fabrication process [3].

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Section: Introductionmentioning

confidence: 99%

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

et al. 2012

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“…However, a vast tunneling current arises and power dissipation becomes significantly high when the gate oxide thickness is less than 1.5 nm [3]. In order to solve these problems, it is needed a high-κ dielectric with equivalent electrical oxide thickness but higher physical thicknesses to replace SiO 2 such as Ta [4][5][6][7]. Since having good dielectric properties and good thermal stability on silicon substrates, Hf-based silicates are the promising candidate to replace SiO 2 compared to other high-κ materials [8][9][10].…”

Section: Introductionmentioning

confidence: 99%

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

Noor¹,

Iskandar²,

Abdullah³

et al. 2012

TELKOMNIKA

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Pada makalah ini telah dikembangkan sebuah model arus terobosan yang melalui kapasitor MOS dielektrik ganda dengan melibatkan massa anisotropik. Transmittansi dihitung secara numerik dengan menggunakan metode transfer matriks dan menyertakan efek kopling antara energi longitudinal dan kinetik yang diwakili oleh kecepatan fasa elektron di gerbang. Transmittansi yang diperoleh kemudian digunakan untuk menghitung arus terobosan di dalam kapasitor MOS TiN/HfSiOxN/SiO2/p-Si. Hasil perhitungan menunjukkan bahwa seiring bertambahnya kecepatan elektron, transmittansi menurun dan arus terobosan berkurang. Arus terobosan menurun seiring dengan bertambahnya ketebalan oksida setara untuk lapisan HfSiOxN. Saat arah elektron datang menembus penghalang tegak lurus antarmuka lapisan, proses terobosan elektron menjadi lebih mudah. Diperoleh pula bahwa arus terobosan tidak bergantung pada orientasi substrat. Lebih lanjut, model yang diajukan dapat digunakan dalam mendesain divais MOS berkecepatan tinggi dengan arus terobosan yang rendah.

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“…1 Electrical characterization studies have shown that the absence of an interfacial silicon oxide layer has a detrimental impact on the carrier mobility in the silicon substrate. 2 Different explanations have been proposed to account for this observed degradation including the coupling of carriers to surface softoptical phonons 3,4 and remote-Coulomb scattering. 5,6 Both of these mechanisms are reported to have a reduced impact on mobility degradation as the thickness of the SiO x interlayer is increased however, this negatively impacts on the minimum equivalent oxide thickness ͑EOT͒ which can be realized.…”

mentioning

confidence: 99%

“…Therefore, this observed effect of interface disorder would have a similar dependence on the thickness of a SiO 2 buffer layer as the other proposed explanations for mobility degradation. [3][4][5][6] While the dielectric constant of the interfacial hafnium silicate layer would be expected to be greater than that of an equivalently thick SiO 2 layer, it would be difficult to compensate for the disrupted nature of the Si/ SiO 2 interface. In fact, it could be speculated that the conventional hydrogen based passivation techniques used to improve the electrical characteristics of the thermally formed Si/ SiO 2 interface for device application would be less effective in the case of the hafnium silicate-silicon interface because of the induced disorder.…”

mentioning

confidence: 99%

High resolution photoemission study of SiOx/Si(111) interface disruption following in situ HfO2 deposition

McDonnell

Brennan

Hughes

2009

Applied Physics Letters

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We report on an in situ high resolution core level photoemission study of the early stages of interface formation between an ultrathin SiO x layer ͑ϳ0.3 nm͒ grown on the atomically clean Si͑111͒ surface and a HfO 2 dielectric layer. Si 2p core level spectra acquired at 130 eV photon energy reveal evidence of a chemically shifted component on the lower binding energy side of the substrate peak which is attributed to interface defect states resulting from the incorporation of silicon atoms from the substrate into the interfacial oxide at room temperature. This evidence of Si/ SiO x interface disruption would be expected to increase charge carrier scattering mechanisms in the silicon and contribute to the generally observed mobility degradation in high-k stacks with ultrathin silicon oxide interface layers.

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Beyond SiO2 technology: Simulation of the impact of high-κ dielectrics on mobility

Cited by 9 publications

References 26 publications

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

Numerical Simulation of Tunneling Current in an Anisotropic Metal-Oxide-Semiconductor Capacitor

High resolution photoemission study of SiOx/Si(111) interface disruption following in situ HfO2 deposition

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