Berkeley reliability tools-BERT

WiT: Optimal Wiring Topology for Electromigration Avoidance

“…Although most of Steiner tree problems are proven NP-hard [22], the wiring topology for EM problem belongs to class P. 5 The running time of a strongly polynomial-time algorithm for a network problem is bounded by the numbers of nodes and edges and not by the magnitudes of the edge costs or capacities. 6 When the force of the electron wind is much greater than the force of the electrical field, ionized atoms are swept along with the flow of electrons. These atoms accumulate at grain boundaries thus forming hillocks (short-circuit defects) and leaving voids (open-circuit defects) at their original positions [2].…”

“…Hence, as depicted in Fig. 3(a), the wirelength between two arbitrary points and is equal to their Manhattan distance (6) There are many possible monotonic rectilinear routes for two arbitrary sources/sinks and it can be seen that all monotonic routes consume an equal wirelength. Hence, the practical route between any two sources/sinks can be abstracted by a slant wire segment of length equal to their Manhattan distance.…”

Lifetime Yield Optimization of Analog Circuits Considering Process Variations and Parameter Degradations

“…One of the most famous tools is the Berkeley Reliability Tools (BERT) (Tu et al, 1993), which is the origin of the tool RelXpert by Cadence today. Our proposed new design flow does not rely on specific tools or models.…”

On improving dependability of analog and mixed-signal SoCs

“…Initially, tools like HOTRON [Aur87], RELY [She89], and BERT [Tu93] were used to study the degradation effects caused by electro-migration and hot carrier mechanisms. The Berkeley Reliability Tools (BERT) is one of the famous tools used till today that is composed of a set of methods developed by Hu et al at the University of California Berkeley in the early 90's [Tu93].…”