2012 IEEE 25th International Conference on Micro Electro Mechanical Systems (MEMS) 2012
DOI: 10.1109/memsys.2012.6170130
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Below-IC post-CMOS integration of thick MEMS on a thin-SOI platform using embedded interconnects

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Cited by 2 publications
(2 citation statements)
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“…The demonstrated accelerometers were fabricated using an in-house SOI CMOS process. A unique below IC integration of SOI MEMS has been employed with an NXP/Philips semiconductor (NPX Semiconductors, Eindhoven, The Netherlands) as an approach to fabricate various devices [ 96 ]. In contrast to most methods in which top silicon layer is used for MEMS structure, in this approach, bulk substrate is thinned down as thick MEMS structure and is connected to CMOS circuits located in thin top Si layer through polysilicon plug in thin SOI layer.…”
Section: Post-cmos Memsmentioning
confidence: 99%
“…The demonstrated accelerometers were fabricated using an in-house SOI CMOS process. A unique below IC integration of SOI MEMS has been employed with an NXP/Philips semiconductor (NPX Semiconductors, Eindhoven, The Netherlands) as an approach to fabricate various devices [ 96 ]. In contrast to most methods in which top silicon layer is used for MEMS structure, in this approach, bulk substrate is thinned down as thick MEMS structure and is connected to CMOS circuits located in thin top Si layer through polysilicon plug in thin SOI layer.…”
Section: Post-cmos Memsmentioning
confidence: 99%
“…With MEMS-first integration, the entire MEMS processing is performed on a substrate (typically resorting to bulk-micromachining techniques), followed by the fabrication of the semiconductor devices [9][10][11]. A severe limitation of this approach is that typical commercially available semiconductor process nodes are ordinarily not compatible with prealtered wafers.…”
Section: Benefits and Types Of Monolithic Integrationmentioning
confidence: 99%