Bandwidth Extension of CMOS Transimpedance Amplifier Using On-Chip Spiral Inductor

Abstract

This paper presents bandwidth extension of been reported [1,[10][11][12]. The bandwidth of the TIAs extended differential CMOS transimpedance amplifier (TIA) using on-chip with much smaller inductances. However, the nonidealities of inductor techniques. On-chip spiral inductor is connected in series on-chip inductor such as parasitic capacitance produce a with the output node to enhance the bandwidth. The effects of the reduction in bandwidth improvement. In this paper, effects of inductor nonidealities are included in the design. Simple and t accurate inductor lumped circuit model is used in analyzes. ctorparasitic onthe bandwidth extension are includedinSimulation results show that the bandwidth is increased by 47% by the analysis.using on-chip spiral inductor. Without on-chip inductor the This paper is organized as follows. Section II describes a bandwidth is 27.764 GHz and it is extended to 41.009 GHz. The lumped circuit model for a spiral inductor. Design of TIA using total load resistance is partitioned between the inductor series on-chip inductor is described in Section III. Bandwidth resistance and an external load resistance to reduce the nonideality extension using on-chip inductor and parasitic effects are of the on-chip inductor and improve the bandwidth with no af di onalhp dipton. illustrated in the results and discussions in Section IV. Finally, additional power dissipation.conclusions are given in Section V.Index Terms-bandwidth extension, on-chip inductor model, transimpedance amplifier.