Bandpass delta-sigma class-S amplifier

Iwamoto, M.; Jayaraman, A.; Hanington, G.; Chen, P.F.; Bellora, A.; Thornton, W.; Larson, L.E.; Asbeck, P.M.

doi:10.1049/el:20000794

Cited by 47 publications

(7 citation statements)

References 1 publication

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“…Various groups have studied several efficiency enhancement techniques, such as Doherty [1][2][3][4], envelope tracking [5,6], envelope elimination and restoration [7], and linear amplification with nonlinear components [8]. The class-S amplifier and the concept of digital amplifier based on the delta-sigma modulator (DSM) and switch-mode PA (SMPA) with push-pull structure, is now being intensively investigated because the class-S system has potential to provide high linearity and efficiency [9,10].…”

Section: Introductionmentioning

confidence: 99%

Evaluation of GaN Transistors Having Two Different Gate-Lengths for Class-S PA Design

Park¹,

Yoo²,

Kim³

et al. 2014

Journal of electromagnetic engineering and science

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This paper presents a characteristic evaluation of commercial gallium nitride (GaN) transistors having two different gate-lengths of 0.4-μm and 0.25-μm in the design of a class-S power amplifier (PA). Class-S PA is operated by a random pulse-width input signal from band-pass delta-sigma modulation and has to deal with harmonics that consider quantization noise. Although a transistor having a short gate-length has an advantage of efficient operation at higher frequency for harmonics of the pulse signal, several problems can arise, such as the cost and export license of a 0.25-μm transistor. The possibility of using a 0.4-μm transistor on a class-S PA at 955 MHz is evaluated by comparing the frequency characteristics of GaN transistors having two different gate-lengths and extracting the intrinsic parameters as a shape of the simplified switch-based model. In addition, the effectiveness of the switch model is evaluated by currentmode class-D (CMCD) simulation. Finally, device characteristics are compared in terms of current-mode class-S PA. The analyses of the CMCD PA reveal that although the efficiency of 0.4-μm transistor decreases more as the operating frequency increases from 955 MHz to 3,500 MHz due to the efficiency limitation at the higher frequency region, it shows similar power and efficiency of 41.6 dBm and 49%, respectively, at 955 MHz when compared to the 0.25-μm transistor.Key Words: Cass-S amplifier, Current-Mode Amplifier, Gallium Nitride (GaN), Gate-Length, Switch-Mode Amplifier. This is an Open-Access article distributed under the terms of the Creative Commons Attribution Non-Commercial License (http://creativecommons.org/licenses/ by-nc/3.0) which permits unrestricted non-commercial use, distribution, and reproduction in any medium, provided the original work is properly cited. ⓒ

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Section: Introductionmentioning

confidence: 99%

Evaluation of GaN Transistors Having Two Different Gate-Lengths for Class-S PA Design

Park¹,

Yoo²,

Kim³

et al. 2014

Journal of electromagnetic engineering and science

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“…Publication of work on class S power amplification has increased with interest in finding suitable means of integrating the baseband DSP and RF front end functions of wireless devices. Class S PA theory is detailed in many sources including [2] and [3], results of simulations for devices operated in current mode and voltage mode at high frequency are shown in [4] and [5] respectively. Experimental measurements for a complete design at RF frequencies are not as widely available.…”

Section: Introductionmentioning

confidence: 99%

Reconfigurable Class S power amplifiers at RF and microwave frequencies

Dooley

Podsiadlik

Canniff

et al. 2008

2008 Workshop on Integrated Nonlinear Microwave and Millimetre-Wave Circuits

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Abstract-When a delta-sigma modulator (DSM) is placed before a class D switching stage the combination can be used to amplify time varying envelope signals. However a bandpass DSM is commonly employed and is required to have a sampling frequency approximately four times the carrier frequency. At RF or microwave frequencies proprietary hardware was previously needed to implement the DSM. However, it is shown here in simulation and from experimental measurement that a suitable DSM for class S power amplifiers can be implemented at RF and microwave frequencies using mid-range FPGA technology.

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“…In addition, the design, synthesis, layout and testing of digital systems can be highly automated. The DDS with 1-bit -D/A converter is attractive in digital transmitters, where it allows the output transistors to be operated in a power-efficient switching mode, and thus may result in an efficient power amplifier [3][4][5][6]. Figure 3 shows the block diagram of the designed digital quadrature modulator.…”

Section: Introductionmentioning

confidence: 99%

Digital Modulator with Bandpass Delta-Sigma Modulator

Sommarek¹,

Vankka²,

Ketola³

et al. 2005

Analog Integr Circ Sig Process

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A digital quadrature modulator with a bandpass -modulator is presented that interpolates orthogonal input carriers by 16 and performs a digital quadrature modulation at carrier frequencies f s /4, − f s /4 ( f s is the sampling frequency). After quadrature modulation, the signal is converted into an analogue IF signal using a bandpass modulator and a 1-bit D/A converter. The die area of the chip is 5.2 mm 2 (0.13 µm CMOS technology). The total power consumption is 139 mW at 1.5 V with a clock frequency of 700 MHz (D/A converter full-scale output current 11.5 mA).

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Bandpass delta-sigma class-S amplifier

Cited by 47 publications

References 1 publication

Evaluation of GaN Transistors Having Two Different Gate-Lengths for Class-S PA Design

Evaluation of GaN Transistors Having Two Different Gate-Lengths for Class-S PA Design

Reconfigurable Class S power amplifiers at RF and microwave frequencies

Digital Modulator with Bandpass Delta-Sigma Modulator

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