Band alignment and defect states at SiC/oxide interfaces

Abstract

Comparative analysis of the electronic structure of thermally oxidized surfaces of silicon and silicon carbide indicates that in both cases the fundamental (bulkband-related) spectrum of electron states is established within less than 1 nm distance from the interface plane. The latter suggests an abrupt transition from semiconductor to insulator. However, a large density of interface traps is observed in the oxidized SiC, which are mostly related to the clustering of elemental carbon during oxide growth and to the presence of defects in the near-interfacial oxides. Recent advancements in reducing the adverse effect of these traps suggest that the SiC oxidation technology has not reached its limits yet and fabrication of functional SiC/oxide interfaces is possible.

Nature of intrinsic and extrinsic electron trapping in SiO2

“…This is much higher than observed densities of the established intrinsic defects in thermally grown a-SiO 2 . The absence of a comparable density of electron traps in bulk a-SiO 2 and the strong sensitivity of electron trapping to the incorporation of nitrogen at the interface, 28,29 suggest that electron trapping at 2.8 eV deep centers takes place not on pre-existing defects but rather in the oxide network itself. Whether the substrate plays any role in stabilizing these traps remains unclear.…”

High-K: Latest Developments and Perspectives

“…Moreover, the development of an oxide insulator technology, that is not thermally grown, for the conventional silicon semiconductor technology may make the application of a similar approach to other semiconductors (e.g., Ge, GaAs, and SiC) feasible promising improved MOS device performance for these semiconductor materials [10].…”

“…First, it has to be thermodynamically stable in contact with silicon [7], it must be process compatible with CMOS (complementary MOS) and withstand source/drain implant annealing, oxygen diffusion should be low to prevent generation of a sizeable SiO 2 interface layer (IL) or trapping defects [8], and it must have sufficiently high band offsets to act as barrier for electrons and holes [9]. Also, the high-k oxide has to show a high quality interface to silicon, with only few interface or defect states within the silicon band gap, be-cause the performance of a field effect transistor strongly depends on the quality of the dielectricsilicon interface [10]. Moreover, the development of an oxide insulator technology, that is not thermally grown, for the conventional silicon semiconductor technology may make the application of a similar approach to other semiconductors (e.g., Ge, GaAs, and SiC) feasible promising improved MOS device performance for these semiconductor materials [10].…”

“…Also, the high-k oxide has to show a high quality interface to silicon, with only few interface or defect states within the silicon band gap, be-cause the performance of a field effect transistor strongly depends on the quality of the dielectricsilicon interface [10]. Moreover, the development of an oxide insulator technology, that is not thermally grown, for the conventional silicon semiconductor technology may make the application of a similar approach to other semiconductors (e.g., Ge, GaAs, and SiC) feasible promising improved MOS device performance for these semiconductor materials [10].…”

“…Also, the high-k oxide has to show a high quality interface to silicon, with only few interface or defect states within the silicon band gap, be- Online: 2008-03-24 ISSN: 1662-9752, Vols. 573-574, pp 165-180 doi:10.4028/www.scientific.net/MSF.573-574.165 © 2008 This is an open access article under the CC-BY 4.0 license (https://creativecommons.org/licenses/by/4.0/) cause the performance of a field effect transistor strongly depends on the quality of the dielectricsilicon interface [10]. …”