High-K: Latest Developments and Perspectives

Abstract

Abstract. The paper reviews recent progress and current challenges in implementing high-k dielectrics in microelectronics. Logic devices, non-volatile-memories, DRAMs and low power mixedsignal components are found to be the technologies where high-k dielectrics are implemented or will be introduced soon. Two gate architectures have to be considerd: MOS with metal as gate electrode and MIM. In particular, Hf-silicates for logic and NVM devices in conventional MOS architecture and ZrO 2 for DRAM cells in MIM architecture are discussed. Fields of applicationsThe breakthrough and thus the enormous growth of the microelectronics, especially in the Information Technology, in the past few decades is based, to a large extend, on the SiO 2 /Si system which was therefore called "a simple gift of nature". Gate dielectrics consisting of ultra thin silicon dioxide layers are the key element in conventional silicon based microelectronic devices. In the very beginning of the microelectronics, the thickness of the SiO 2 gate oxide was a few hundred nanometers. Nowadays, state-of-the-art MOSFETs (metal oxide semiconductor field effect transistor) require gate oxide thicknesses of just a few atomic layers. Until recently, the continuous scaling of the ULSI (ultra large scale integration) devices has been accomplished by shrinking physical dimensions. Physical gate oxides with physical thicknesses in the range of 1.6 nm are currently fabricated and thicknesses below 1.0 nm will be requested for future device generations [1]. In this thickness range, key dielectric parameters degrade, like gate leakage current, channel mobility, reliability etc. [2,3,4]. Thus, the necessity arises to replace the SiO 2 with a dielectric of higher permittivity [5,6]. Application of oxides with a higher dielectric constant (high-k) allows for a physically thicker insulating layer with the same capacitance per unit area as that required for SiO 2 . The so-called equivalent oxide thickness (EOT) is defined as follows: EOT = d high-k · k SiO2 / k high-k .(1) d high-k is the physical oxide thickness, k SiO2 and k high-k are the dielectric constant of the silicon dioxide and the high-k oxide, respectively. But, the high-k dielectric has to satisfy several requirements to fulfil all the demands of state-of-the-art gate dielectrics. First, it has to be thermodynamically stable in contact with silicon [7], it must be process compatible with CMOS (complementary MOS) and withstand source/drain implant annealing, oxygen diffusion should be low to prevent generation of a sizeable SiO 2 interface layer (IL) or trapping defects [8], and it must have sufficiently high band offsets to act as barrier for electrons and holes [9]. Also, the high-k oxide has to show a high quality interface to silicon, with only few interface or defect states within the silicon band gap, be- Online: 2008-03-24 ISSN: 1662-9752, Vols. 573-574, pp 165-180 doi:10.4028/www.scientific.net/MSF.573-574.165 © 2008 This is an open access article under the CC-BY 4.0 license (https://creativecomm...

Pt3Zr(0001): A substrate for growing well-ordered ultrathin zirconia films by oxidation

“…Zirconia (ZrO 2 ) in pure and doped form is an important material in various fields, with applications in engineering (zirconia toughened alumina, ZTA; zirconiabased thermal barrier coatings for gas turbines 1 ), ceramics for dentistry (tetragonal zirconia polycrystal, TZP), 2 and as a high-k dielectric in microelectronics. 3 Zirconia is also a catalyst support and a catalyst on its own. 4,5 With its wide bandgap (> 5 eV), zirconia is a perfect insulator.…”

The origin of 2.7 eV luminescence and 5.2 eV excitation band in hafnium oxide

“…Among all high-k dielectrics, hafnium oxide (HfO 2 ) is presently the predominant choice of materials for the gate dielectric in metal-oxide-semiconductor (CMOS) devices, DRAM (dynamic random access memory) capacitors, and a blocking insulator in Si-oxide-nitride-oxide-silicon (SONOS)type flash memory cells. 1 One of the main problems on the way of HfO 2 mass implementation in the technological process is a high conductivity caused by defects with high concentration. Oxygen vacancies are the most probable and spread defects responsible for high conductivity.…”

PrOAlN dielectrics for metal insulator semiconductor stacks

“…This leads to problems like power losses, overheating and decreased reliability. In the last decade a lot of research has been done to investigate materials which own a higher permittivity value (high‐ k ) than SiO 2 in order to substitute the conventional dielectric 2–8. High‐ k insulators can be thicker at the same or even smaller capacitance equivalent thickness (CET), offering a lower leakage current.…”

“…This opens the discussion on the challenging requirements for high‐ k materials. Beside the absolute need for a higher k ‐value the gate oxide should satisfy requirements like high band offsets, thermal stability, interface quality, effect on carrier mobility, ability to control the threshold voltage of a FET, it must be process compatible with complementary metal oxide semiconductor (CMOS) and withstand process annealing steps, and oxygen diffusion should be low to prevent interfacial layer (IL) formations or trapping defects 7, 11.…”

“…It was also found that the replacing of the silicon oxide by a high‐ k material must be accompanied by the introduction of metal gates because the depletion layer in the polysilicon (poly‐Si) gate (0.3–0.4 nm) cannot be ignored in that thin gate oxide thickness set‐up 2, 3, 6, 7, 11.…”