2016
DOI: 10.1088/1748-0221/11/11/c11018
|View full text |Cite
|
Sign up to set email alerts
|

Back-end and interface implementation of the STS-XYTER2 prototype ASIC for the CBM experiment

Abstract: Each front-end readout ASIC for the High-Energy Physics experiments requires robust and effective hit data streaming and control mechanism. A new STS-XYTER2 full-size prototype chip for the Silicon Tracking System and Muon Chamber detectors in the Compressed Baryonic Matter experiment at Facility for Antiproton and Ion Research (FAIR, Germany) is a 128-channel time and amplitude measuring solution for silicon microstrip and gas detectors. It operates at 250 kHit/s/channel hit rate, each hit producing 27 bits o… Show more

Help me understand this report

Search citation statements

Order By: Relevance

Paper Sections

Select...
1
1
1
1

Citation Types

0
8
0

Year Published

2017
2017
2024
2024

Publication Types

Select...
5
4

Relationship

1
8

Authors

Journals

citations
Cited by 16 publications
(8 citation statements)
references
References 9 publications
0
8
0
Order By: Relevance
“…Testing all produced ASICs, assembled FEBs, and full modules is the essential quality verification step in the production process [8,9]. The SMX contains complex analog [10] and digital [11] functionality controlled via a rich set of registers accessible with a dedicated Hit Control Transfer Synchronous Protocol (HCTSP) [12]. The same protocol is also used to send the received hit data to the data acquisition system.…”
Section: Motivation For Tester Developmentmentioning
confidence: 99%
“…Testing all produced ASICs, assembled FEBs, and full modules is the essential quality verification step in the production process [8,9]. The SMX contains complex analog [10] and digital [11] functionality controlled via a rich set of registers accessible with a dedicated Hit Control Transfer Synchronous Protocol (HCTSP) [12]. The same protocol is also used to send the received hit data to the data acquisition system.…”
Section: Motivation For Tester Developmentmentioning
confidence: 99%
“…The ASIC counts the number of channels with almost-full FIFOs. The channel threshold triggering an alert is programmable [4]. If exceeded, the ASIC reports an almost full condition to the CRI by sending an alert frame.…”
Section: Throttling Systemmentioning
confidence: 99%
“…In the data flow model shown in figure 2, the maximum number of 5 readout elinks/ASIC are active [4], resulting in 50 MHits/ASIC/s as bandwidth limit. The corresponding drain time of the…”
Section: Simulation Environmentmentioning
confidence: 99%
“…2). Silicon strip detector signals are read out via micro-cables by corresponding readout SMX ASICs (STS-MUCH-xyter [1] [2] [3]) located on Front End Boards (FEBs).…”
Section: General Assumptionsmentioning
confidence: 99%