Automatic tuning of RC filters and fast automatic gain control for CMOS low-IF transceiver

Oshima, Takashi; Maio, K.; Hioe, W.; Shibahara, Y.; Doi, Takashi

doi:10.1109/cicc.2003.1249348

Cited by 15 publications

(6 citation statements)

References 5 publications

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“…ŽDF derinimo būdai skirstomi į: tiesioginio valdymo, netiesioginio ryšio, bei naudojančias du pagrindinius filtrus (Kiela 2017). Taip pat, derinimo sistemų architektūros skirstomos į (Kladovščikov 2015): vėlinimo derinimo kilpos (Oshima et al 2003, Oshima et al 2004, Khoury 1994, Jin et al 2012, Jinup et al 2005, Youngjoo et al 2005, generuojamų dažnių lyginimo (Vasilopoulos et al 2006), talpų įsikrovimo lyginimo sistemas (Bo et al 2004, Dingkun et al 2006, Chen et al 2011. Tiesioginio valdymo derinimo būdo atveju panaudojamas pagrindinis filtras ir derinimo grandynas.…”

Section: žEmųjų Dažnių Filtro Ribinis Dažnis Ir Stiprinimasunclassified

“…Nuoseklaus jungimo PRM (4.4 pav.) pasižymi maža komponentų varža (Oshima et al 2003, Oshima et al 2004, Jin, Dai 2012, Heping et al 2009, kuri gali būti vienoda kiekvienam matricą sudarančiam rezistoriui ir valdoma temperatūriniu kodu, arba mažėjanti santykiu 2 kiekvienam paskesniam rezistoriui ir valdoma dvejetainiu kodo signalu. Valdymo tranzistoriai prijungti lygiagrečiai prie kiekvieno rezistoriaus -perjungimo metu yra užtrumpinami, taip nustatant varžą tarp taškų 0 Ω arba R/2n Ω. Pagrindinis tokios struktūros trūkumasvaldymo tranzistorių kanalo varžos įtaka derinimo tikslumui.…”

Section: Classification Of Tuning Matricesunclassified

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Belaidžio ryšio siųstuvų-imtuvų filtrų savitestavimo ir autokalibravimo metodų sukūrimas ir tyrimas

Kladovščikov¹

2020

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Section: žEmųjų Dažnių Filtro Ribinis Dažnis Ir Stiprinimasunclassified

Section: Classification Of Tuning Matricesunclassified

Belaidžio ryšio siųstuvų-imtuvų filtrų savitestavimo ir autokalibravimo metodų sukūrimas ir tyrimas

Kladovščikov¹

2020

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“…Because the CT ΔΣ ADC loop coefficients are chosen at the edge of the stable region to achieve maximum SNR, such variation may lead to an unstable operation and performance degradation. A tuning technique of the filter cutoff frequencies, as proposed in [19] and [20], is implemented to deal with the large tolerance of the integrated passive RC product during the start-up period of the receiver. In this work, a 3-bit programmable unit capacitors array is implemented as loop filter capacitors, which is automatically tuned to ensure that the coefficients stay near the theoretically optimal values.…”

Section: Continuous-time Delta-sigma A/d Converters Designmentioning

confidence: 99%

A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

Huang

Chen

Wang

et al. 2014

Circuit Theory & Apps

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In this work, a power-area-efficient, 3-band, 2-RX MIMO, and TD-LTE (backward compatible with the HSPA+, HSUPA, HSDPA, and TD-SCDMA) CMOS receiver is presented and implemented in 0.13-μm CMOS technology. The continuous-time delta-sigma A/D converters (CT ΔΣ ADCs) are directly coupled to the outputs of the transimpedance amplifiers, eliminating the need of analog anti-aliasing filters between RX front-end and ADCs in conventional structures. The strong adjacent channel interference without lowpass filter attenuation is handled by proper gain control. A low-power small-area solution for excess loop delay compensation is implemented in the CT ΔΣ ADC. At 20 MHz bandwidth, the CT ΔΣ ADC achieves 66 dB dynamic range and 3.5 dB RX chip noise figure is measured. A maximum of 2.4 dB signal-to-noise ratio degradation is measured in all the adjacent channel selectivity (ACS) and blocking tests, demonstrating the effectiveness of the strategy against the low-pass filter removal from the conventional architecture. The receiver dissipates a maximum of 171 mW at 2-RX MIMO mode. To our best knowledge, it is the first research paper on the design of fully integrated commercial TD-LTE receiver.

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“…However, usually PGAs of 10-20 dB gain range per stage are enough in wireless applications and 2-3 dB gain steps are also acceptable. Therefore, the most common solution is a simple comparator bank ADC [56,57], as shown in Fig. 3.55. …”

Section: Digital Controlmentioning

confidence: 99%

Automatic Gain Control

Pérez¹,

Pueyo

López

2011

Analog Circuits and Signal Processing

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), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks, and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights.Printed on acid-free paper PrefaceReceivers have been a basic block in telecommunication systems since the invention of the radio in the late 19th century, acquiring an essential role in what has been called the third Communication Revolution where information is transferred via controlled waves and electronic signals. Their main function is to recover the information from the transmitted wave and convert it to electronic signals that can be understood by the succeeding electronic processing signal systems. Since the Internet revolution, new receivers appeared to connect computers one to another or to the World Wide Web, such as wireless systems, have been gaining more and more popularity over the last few years. Thus, great investments in time, effort and money from both academia and industry have been made in the development of these receivers in order to achieve fully integrated solutions in form of ASICs meeting the demand for ever increasing high performance with low cost, low voltage supply, low power consumption and reduced surface area.The design of one of these receivers include different blocks such as filters, low noise amplifiers, gain controlled amplifiers, mixers and analog to digital converters. This book is precisely focused on the analysis and design of automatic gain control, AGC, circuits with wireless receivers as the main target application. In this context, the general function of the AGC circuitry is to automatically adjust the output signal of a variable gain amplifier to an optimal rated level, for different input signal strengths. This function is essential to guarantee that the system dynamic range is neither saturated with large signals nor makes the system fall below a tolerable noise level.Specifically, some wireless applications, such as WLAN or Bluetooth, must be able to handle packets-based data transmission and orthogonal frequency division multiplexing which introduce stringent settling-time constraints. Thus, fast AGCs are primordial in those systems. It is under these conditions that feedforward AGCs present their greatest advantages as an alternative to conventional feedback AGCs. Thus, all through this book we offer a detailed study about feedforward AGCs design-both at basic AGC cells and system level-, their main characteristics and performances. vi viThe starting point is a complete review and theoretical analysis of both feedforward and feedback configurations and their behavioural modelling, issues addressed in Chap. 2.Next, basic components in gain control func...

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Automatic tuning of RC filters and fast automatic gain control for CMOS low-IF transceiver

Cited by 15 publications

References 5 publications

Belaidžio ryšio siųstuvų-imtuvų filtrų savitestavimo ir autokalibravimo metodų sukūrimas ir tyrimas

Belaidžio ryšio siųstuvų-imtuvų filtrų savitestavimo ir autokalibravimo metodų sukūrimas ir tyrimas

A power‐area‐efficient, 3‐band, 2‐RX MIMO, TD‐LTE receiver with direct‐coupled ADC

Automatic Gain Control

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