Automatic Synthesis of Analog Integrated Circuits Including Efficient Yield Optimization

Severo, Lucas Compassi; Kepler, Fabio Natanael; Girardi, Alessandro

doi:10.1007/978-3-319-19872-9_2

Cited by 12 publications

(12 citation statements)

References 28 publications

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“…UCAF is a tool for automatic sizing of analog integrated circuits, such as operational amplifiers [27]. It is based on an optimization methodology using heuristics to explore the design space and SPICE electrical simulation to evaluate circuit electrical behavior.…”

Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

“…It is based on an optimization methodology using heuristics to explore the design space and SPICE electrical simulation to evaluate circuit electrical behavior. A cost function given in terms of the expected circuit performance is defined to model the design of an analog IC block through a generic optimization problem [27]. The tool receives as input the design requirements, the parameters from the target manufacturing technology process and the netlist that represents circuit topology.…”

Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

“…This cost function fully defines the performance space, which can be explored by an optimization heuristic in the search for a minimum point. The optimized solution corresponds to this point [27].…”

Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

“…In order to analyze the implementation characteristics and the applicability for analog circuit sizing optimization, we describe in this paper the modeling and design procedure of three heuristics (PSO, FA and CS) to size a two-stage Miller OTA. For this, we use the automatic sizing tool called UCAF [27] and exactly the same boundary conditions for the three algorithms.…”

Section: Introductionmentioning

confidence: 99%

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Two-Stage OTA Sizing Optimization Using Bio-Inspired Algorithms

Fortes

Silva

Domanski

et al. 2019

JICS

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The analog part of a mixed-signal integrated circuit represents a great amount of the circuit sizing effort. It is necessary to size each device separately and, in cases with several variables, the design space becomes quite large. The analog integrated circuit sizing can be modeled as an optimization problem and solved by optimization heuristics. In this work, we compare three bio-inspired heuristics to size a two-stage CMOS Miller operational transconductance amplifier: Particle Swarm Optimization (PSO), Cuckoo Search (CS) and Firefly Algorithm (FA). The goal is to evaluate the applicability of these heuristics for the analog sizing problem and to determine the best configuration of the algorithms parameters for optimizing performance of the generated circuit, mainly power consumption and silicon area. Results show that PSO and CS are more suitable to find optimized solutions, while FA presents less efficient exploration of the design space. Although PSO is faster and generates good solutions, the best overall solution was achieved with CS algorithm.

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Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

Section: Analog Ic Optimization Methodologymentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

See 2 more Smart Citations

Two-Stage OTA Sizing Optimization Using Bio-Inspired Algorithms

Fortes

Silva

Domanski

et al. 2019

JICS

View full text Add to dashboard Cite

show abstract

“…In other works [3,4,5], the design is carried out through an optimization process with the aim of exploring the solution space for the circuit, using single-and multi-objective optimization heuristics. Some methodologies consider the variability of the manufacturing process and the operating environment during the design stage [6,7,8,9]. At layout level, there are tools that generate the transistor layout and optimize placement and routing to reduce area and the effects of parasites [10].…”

Section: Introductionmentioning

confidence: 99%

A Comprehensive Review on Automation-based Sizing Techniques for Analog IC Design

Girardi

De-Oliveira

Ghissoni

et al. 2022

JICS

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Analog integrated circuits are present in most electronic systems. They must be designed carefully in order to achieve the required performance specifications. Although almost half of the design effort in a chip is spent in analog modules, there are not yet a consolidated industry of analog design automation tools capable to fully synthesize analog circuits in a fast and generic way. This is due the fact that automatic or semi-automatic design tools have to deal with high design complexity, which includes several specifications and design variables. A lot of research effort have been done in this field in the past years, proposing methods for automating parts of the design flow, from topology selection to devices sizing and layout generation. This paper presents a review of the state-of-the art in analog design automation methods, focusing on techniques and algorithms used to size robust circuits while efficiently exploring the design space.

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Design Methodology for ULV Circuits

Severo

Noije

2021

Ultra-Low Voltage Low Power Active-Rc Filters and Amplifiers for Low Energy RF Receivers

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Automatic Synthesis of Analog Integrated Circuits Including Efficient Yield Optimization

Cited by 12 publications

References 28 publications

Two-Stage OTA Sizing Optimization Using Bio-Inspired Algorithms

Two-Stage OTA Sizing Optimization Using Bio-Inspired Algorithms

A Comprehensive Review on Automation-based Sizing Techniques for Analog IC Design

Design Methodology for ULV Circuits

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