Automatic software toolkit generation for embedded systems-on-chip

Abstract

Modem Embedded Systems-on-Chips (SOCs) will allow the system designer to customize Intellectual Property (IP) cores (fixed and programmable), together with custom logic and large amounts of embedded memories. As the software content in these emerging embedded SOCs begins to dominate the SOC design process, there is a critical need for support of an tntegmted software development environment (including compilers, simulators and debuggers). Furthermore, since many characteristics of these processor core IPS (e.g., instruction-sets, memory configurations) are increasingly customizable, the entire software toolkit chain needs to be customized and generated to support both early design space ezploration (for performance, power and cost constraints), as well as high-quality software generation. This paper first surveys recent efforts in Architecture Description Languages (ADLs) used to perform early validation and ezplomtion of SOC architectures. The second part of the paper focuses on approaches to software toolkit genemtion that automatically produce the software infrostructure (e.g., compilers, simulators, debuggers) which will enable true hardware/software codesign of these emerging embedded SOCs. t This work is supported in part by grants from NSF (MIP-4 Research at UCI is supported by JSPS postdoctoral fel-9708067 and ONR (N00014-951-1348). lowships for research abroad.

C Compilers for ASIPs

“…Prominent examples for this category of ADLs are MIMOLA [235], UDL/I [264], and AIDL [254]. Combination of both: These so-called mixed-level description languages [13] describe both, the instruction-set behavior and the structure of the design. This enables the generation of software tools as well as a synthesizable hard-ware model.…”

CGADL: An Architecture Description Language for Coarse-Grained Reconfigurable Arrays

“…The constant increase in system complexity and the pressure for design productivity pushed ASIP designers to work at higher abstraction levels. Architecture and system description languages were proposed [12] that offer a set of properties to deal efficiently with the previously mentioned problems. We follow the same approach using an ADL targeted to describe coarse-grained reconfigurable arrays-the CGADL.…”

A design automation and power estimation flow for RFID systems

“…ADL is a language designed to specify architecture templates for Systems on Chips (SoCs). An ADL-based SoC co-design methodology that enables efficient design space exploration of SoC architectures and automatic software toolkit generation has been developed [Halambi et al 1999]. UML is an analogous approach that is a collection of notations for capturing a specification of a software system [Rumbaugh et al 1998].…”