Automatic creation of tile size selection models

Yuki, Tomofumi; Renganarayanan, Lakshminarayanan; Rajopadhye, Sanjay; Anderson, Charles W.; Eichenberger, Alexandre E.; O’Brien, Kevin

doi:10.1145/1772954.1772982

Cited by 43 publications

(23 citation statements)

References 31 publications

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“…Yuki et al [33] proposed an automatic setting model, which is based on program features, synthetic kernels, and machine learning techniques. The model can also dynamically be tuned to adapt to the up-to-date situation.…”

Section: Code Generationmentioning

confidence: 99%

A Survey of Loop Parallelization: Models, Approaches, and Recent Developments

Ye¹,

Deng²,

Zou³

2016

IJGDC

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In cloud computing era, automatic parallelization is still significant for virtualization platform. However, after several decades of development, the overall effect is still to be improved. Summary of the mainstream technology developments will be beneficial to reveal the future direction and trend. This paper reviews the technology of loop parallelization, which is the key issue in automatic parallelization. After introducing the basic models and approaches, we focus on the recent developments, on which we obtain the trend of this field and the conclusions about future.

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Section: Code Generationmentioning

confidence: 99%

A Survey of Loop Parallelization: Models, Approaches, and Recent Developments

Ye¹,

Deng²,

Zou³

2016

IJGDC

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“…To the best of our knowledge, all of these techniques find a single tile size for each loop that is being tiled. Recently, Yuki et al [38] have explored the automatic creation of cubic tile size models. In contrast, we have demonstrated (see Table 3) that the best performance is often realized only for rectangular tiles.…”

Section: Related Workmentioning

confidence: 99%

Analytical Bounds for Optimal Tile Size Selection

Shirako

Sharma

Fauzia

et al. 2012

Lecture Notes in Computer Science

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Abstract. In this paper, we introduce a novel approach to guide tile size selection by employing analytical models to limit empirical search within a subspace of the full search space. Two analytical models are used together: 1) an existing conservative model, based on the data footprint of a tile, which ignores intra-tile cache block replacement, and 2) an aggressive new model that assumes optimal cache block replacement within a tile. Experimental results on multiple platforms demonstrate the practical effectiveness of the approach by reducing the search space for the optimal tile size by 1,307× to 11,879× for an Intel Core-2-Quad system; 358× to 1,978× for an Intel Nehalem system; and 45× to 1,142× for an IBM Power7 system. The execution of rectangularly tiled code tuned by a search of the subspace identified by our model achieves speed-ups of up to 1.40× (Intel Core-2 Quad), 1.28× (Nehalem) and 1.19× (Power 7) relative to the best possible square tile sizes on these different processor architectures. We also demonstrate the integration of the analytical bounds with existing search optimization algorithms. Our approach not only reduces the total search time from Nelder-Mead Simplex and Parallel Rank Ordering methods by factors of up to 4.95× and 4.33×, respectively, but also finds better tile sizes that yield higher performance in tuned tiled code.

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“…Hsu and Kremer [16] provide a comparative study of tile size selection algorithms. Recently, Yuki et al [42] have explored the automatic creation of cubic tile size models.…”

Section: Related Workmentioning

confidence: 99%

Dynamic selection of tile sizes

Tavarageri

Pouchet

Ramanujam

et al. 2011

2011 18th International Conference on High Performance Computing

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Abstract-Tiling is a key program transformation to achieve effective data reuse. But the performance of tiled programs can vary considerably with different tile sizes. Hence the selection of good tile sizes is crucial.Although there has been considerable research on analytical models for selecting tile sizes, they have not been shown to be effective in finding optimal tile sizes across a range of programs and target architectures. Auto-tuning is a viable alternative that is often used in practice, and involves the execution of different combinations of tile sizes in a systematic fashion to find the best ones. But this is sometimes infeasible -for instance when the program is to be run on unknown platforms (e.g., cloud environments).We propose a novel approach for generating code to enable dynamic tile size selection, based on monitoring the performance of a few loop iterations. The selection operates at run time on the "production" run, without any a priori knowledge of the execution environment. We discuss the theory and implementation of a parametric tiled code generator that enables run-time tile size tuning and describe a search strategy to determine effective tile sizes. Experimental results demonstrate the effectiveness of the approach.

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Automatic creation of tile size selection models

Cited by 43 publications

References 31 publications

A Survey of Loop Parallelization: Models, Approaches, and Recent Developments

A Survey of Loop Parallelization: Models, Approaches, and Recent Developments

Analytical Bounds for Optimal Tile Size Selection

Dynamic selection of tile sizes

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