Automatic CPU-GPU communication management and optimization

Jablin, Thomas B.; Prabhu, Prakash; Jablin, James A.; Johnson, Nick; Beard, Stephen R.; August, David I.

doi:10.1145/1993316.1993516

Cited by 52 publications

(5 citation statements)

References 17 publications

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“…For example, in GPU, the communication between CPU and GPU, or the data movement, is an important part of the calculation. So, many researches evaluated the performance of CPU-GPU communication [16], [17]. In this paper, the impact of the runtime environment was evaluated by comparing two parallel implementations of the heat equation executed on two different runtime environments.…”

Section: Our Contributionmentioning

confidence: 99%

Comparative Study of the Execution Time of Parallel Heat Equation on CPU and GPU

Belhaous¹,

Chokri²,

Baroud³

et al. 2021

JCOMSS

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Parallelization has become a universal technique for computing an intensive scientific simulation to shorten the execution time of complex problems. It consists of bringing together the power of several thousand processors to perform complex calculations at high speed. The choice of the runtime environment to execute parallel programs significantly influences the execution time. For this reason, this article aims to materialize the impact of computing architectures on the performance of parallel implementations. To better achieve this contribution, we have implemented the heat equation executed on CUDA platform and we have compared the results with those of SkelGIS implementation from the literature. Through the results of the experiments, we demonstrated that the execution time of the CUDA implementation on graphics processing unit (GPU) is almost 100X faster for very large meshes compared to the other implementations.

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Section: Our Contributionmentioning

confidence: 99%

Comparative Study of the Execution Time of Parallel Heat Equation on CPU and GPU

Belhaous¹,

Chokri²,

Baroud³

et al. 2021

JCOMSS

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“…CPU-GPU data transfer optimizations Data transfers between CPU and GPU have been studied extensively as an important bottleneck for parallelization efforts. Previous work [25,30] established systems for automatic management of CPU-GPU communication. The authors of [29] implemented a system to move OpenMP code to GPUs, optimizing data transfers using data flow analysis.…”

Section: Domain-specific Languagesmentioning

confidence: 99%

Automatically harnessing sparse acceleration

Ginsbach

Collie

O’Boyle

2020

Proceedings of the 29th International Conference on Compiler Construction

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Sparse linear algebra is central to many scientific programs, yet compilers fail to optimize it well. High-performance libraries are available, but adoption costs are significant. Moreover, libraries tie programs into vendor-specific software and hardware ecosystems, creating non-portable code.In this paper, we develop a new approach based on our specification Language for implementers of Linear Algebra Computations (LiLAC). Rather than requiring the application developer to (re)write every program for a given library, the burden is shifted to a one-off description by the library implementer. The LiLAC-enabled compiler uses this to insert appropriate library routines without source code changes.LiLAC provides automatic data marshaling, maintaining state between calls and minimizing data transfers. Appropriate places for library insertion are detected in compiler intermediate representation, independent of source languages.We evaluated on large-scale scientific applications written in FORTRAN; standard C/C++ and FORTRAN benchmarks; and C++ graph analytics kernels. Across heterogeneous platforms, applications and data sets we show speedups of 1.1× to over 10× without user intervention.

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“…CGCM [15] uses a technique for automatic management of GPU/CPU memory communication. This technique is similar to our analysis for determining when lazy or eager copy-outs are used.…”

Section: Related Workmentioning

confidence: 99%

Portable performance on heterogeneous architectures

Phothilimthana

Ansel

Ragan-Kelley

et al. 2013

SIGARCH Comput. Archit. News

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Trends in both consumer and high performance computing are bringing not only more cores, but also increased heterogeneity among the computational resources within a single machine. In many machines, one of the greatest computational resources is now their graphics coprocessors (GPUs), not just their primary CPUs. But GPU programming and memory models differ dramatically from conventional CPUs, and the relative performance characteristics of the different processors vary widely between machines. Different processors within a system often perform best with different algorithms and memory usage patterns, and achieving the best overall performance may require mapping portions of programs across all types of resources in the machine. To address the problem of efficiently programming machines with increasingly heterogeneous computational resources, we propose a programming model in which the best mapping of programs to processors and memories is determined empirically. Programs define choices in how their individual algorithms may work, and the compiler generates further choices in how they can map to CPU and GPU processors and memory systems. These choices are given to an empirical autotuning framework that allows the space of possible implementations to be searched at installation time. The rich choice space allows the autotuner to construct poly-algorithms that combine many different algorithmic techniques, using both the CPU and the GPU, to obtain better performance than any one technique alone. Experimental results show that algorithmic changes, and the varied use of both CPUs and GPUs, are necessary to obtain up to a 16.5x speedup over using a single program configuration for all architectures.

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Automatic CPU-GPU communication management and optimization

Cited by 52 publications

References 17 publications

Comparative Study of the Execution Time of Parallel Heat Equation on CPU and GPU

Comparative Study of the Execution Time of Parallel Heat Equation on CPU and GPU

Automatically harnessing sparse acceleration

Portable performance on heterogeneous architectures

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