Automatically harnessing sparse acceleration

Ginsbach, Philip; Collie, Bruce; O’Boyle, Michael

doi:10.1145/3377555.3377893

Cited by 6 publications

(5 citation statements)

References 49 publications

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“…propose LiLAC, a language and a compiler for accelerating sparse and dense linear algebra [29]. Idiom discovery is still based on a constraints solver, but the pattern specification is made easier by introducing a DSL.…”

Section: Related Workmentioning

confidence: 99%

Progressive Raising in Multi-level IR

Chelini

Drebes²,

Zinenko³

et al. 2021

2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)

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Multi-level intermediate representations (IR) show great promise for lowering the design costs for domain-specific compilers by providing a reusable, extensible, and non-opinionated framework for expressing domain-specific and high-level abstractions directly in the IR. But, while such frameworks support the progressive lowering of high-level representations to low-level IR, they do not raise in the opposite direction. Thus, the entry point into the compilation pipeline defines the highest level of abstraction for all subsequent transformations, limiting the set of applicable optimizations, in particular for general-purpose languages that are not semantically rich enough to model the required abstractions. We propose Progressive Raising, a complementary approach to the progressive lowering in multi-level IRs that raises from lower to higher-level abstractions to leverage domain-specific transformations for low-level representations. We further introduce Multi-Level Tactics, our declarative approach for progressive raising, implemented on top of the MLIR framework, and demonstrate the progressive raising from affine loop nests specified in a general-purpose language to high-level linear algebra operations. Our raising paths leverage subsequent high-level domain-specific transformations with significant performance improvements. Index Terms-MLIR, progressive raising, multi-level intermediate representation / * instantiate the context * / auto _i = m_Placeholder(), _j = m_Placeholder(); auto _A = m_ArrayPlaceholder(); auto matcher = m_Op(_A({2 * _i+1, _j+5})); Listing 6: Declarative access pattern matcher. For(For(For(For(access_callback())))); auto access_callback = [&a](Body loop) { { AccessPatternContext pctx(/ * MLIR ctx * /); auto _a = m_Placeholder(); auto _b = m_Placeholder(); auto _c = m_Placeholder(); auto _d = m_Placeholder(); auto _C = m_ArrayPlaceholder(); auto _A = m_ArrayPlaceholder(); auto _B = m_ArrayPlaceholder(); auto var0 = m_Op(_C({_a, _b, _c})); / * check the store is the last instruction in the block * / auto var1 = m_Op(_C({_a, _b, _c})); auto var2 = m_Op(_A({_a, _c, _d}));

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Section: Related Workmentioning

confidence: 99%

Progressive Raising in Multi-level IR

Chelini

Drebes²,

Zinenko³

et al. 2021

2021 IEEE/ACM International Symposium on Code Generation and Optimization (CGO)

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“…Recently, work trying to automatically match and replace existing code 1 All code available at [12] with accelerator libraries for simple operations has used constraint matching of code to an API description [27,37,45,59]. However these schemes are brittle and fail with minor code variations, and constraints are challenging to write [58]. Exact matching techniques [96,115] fail once the code scales beyond an order of magnitude of ten instructions, and FFTs scale up to thousands.…”

Section: Current Schemesmentioning

confidence: 99%

“…Constraint matching [27,45,57] provides a way of matching and extracting interfaces from high-level code. Unfortunately, these approaches are brittle [45] -they do not scale beyond a single implementation/accelerator pair, and constraint patterns are extremely hard to write [39,40,58]. Rewrite-rule based compilers can be used to target accelerators [77], but these still rely on initial matching using constraints or similar.…”

Section: Existing Compilation Techniquesmentioning

confidence: 99%

Bind the gap: compiling real software to hardware FFT accelerators

Woodruff

Armengol-Estapé

Ainsworth

et al. 2022

Proceedings of the 43rd ACM SIGPLAN International Conference on Programming Language Design and Implementation

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Specialized hardware accelerators continue to be a source of performance improvement. However, such specialization comes at a programming price. The fundamental issue is that of a mismatch between the diversity of user code and the functionality of fixed hardware, limiting its wider uptake.Here we focus on a particular set of accelerators: those for Fast Fourier Transforms. We present FACC (Fourier ACcelerator Compiler), a novel approach to automatically map legacy code to Fourier Transform accelerators. It automatically generates drop-in replacement adapters using Input-Output (IO)-based program synthesis that bridge the gap between user code and accelerators. We apply FACC to unmodified GitHub C programs of varying complexity and compare against two existing approaches. We target FACC to a high-performance library, FFTW, and two hardware accelerators, the NXP PowerQuad and the Analog Devices FFTA, and demonstrate mean speedups of 9x, 17x and 27x respectively.

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“…Idiom recognition is a well-known and studied problem in computer science, which aims to identify program fragments [4,8,20,21,30,38]. Although idiom recognition has found a niche in compiling technology, in areas like code generation (e.g., instruction selection) [2,3,19,37], its broad application is considerably constrained by how modern compilers work.…”

Section: Introductionmentioning

confidence: 99%

Source Matching and Rewriting

Couto¹,

Zago²,

Yviquel³

et al. 2022

Preprint

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A typical compiler flow relies on a uni-directional sequence of translation/optimization steps that lower the program abstract representation, making it hard to preserve higherlevel program information across each transformation step. On the other hand, modern ISA extensions and hardware accelerators can benefit from the compiler's ability to detect and raise program idioms to acceleration instructions or optimized library calls. Although recent works based on Multi-Level IR (MLIR) have been proposed for code raising, they rely on specialized languages, compiler recompilation, or in-depth dialect knowledge. This paper presents Source Matching and Rewriting (SMR), a user-oriented source-codebased approach for MLIR idiom matching and rewriting that does not require a compiler expert's intervention. SMR uses a two-phase automaton-based DAG-matching algorithm inspired by early work on tree-pattern matching. First, the idiom Control-Dependency Graph (CDG) is matched against the program's CDG to rule out code fragments that do not have a control-flow structure similar to the desired idiom. Second, candidate code fragments from the previous phase have their Data-Dependency Graphs (DDGs) constructed and matched against the idiom DDG. Experimental results show that SMR can effectively match idioms from Fortran (FIR) and C (CIL) programs while raising them as BLAS calls to improve performance.

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Automatically harnessing sparse acceleration

Cited by 6 publications

References 49 publications

Progressive Raising in Multi-level IR

Progressive Raising in Multi-level IR

Bind the gap: compiling real software to hardware FFT accelerators

Source Matching and Rewriting

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