“…A lot of chips are accurately bonded on the wafer, and the locations should not exceed the error range to avoid influencing the subsequent test yield of the chip and influencing production capacity (Lin et al, 2011a(Lin et al, , 2011b(Lin et al, , 2011c. Therefore, it is worth discussing and studying how to bond the chip onto a specific position of the wafer accurately and control the error before the chip test (Chen et al, 2016;Li et al, 2013). Furthermore, the proposed system has the following advantages due to its noncontact structure.…”