Automated synthesis of integrated RF CMOS LC VCOs

El-khalik, S.A.; Kayed, Somaya; EL-Azab, M.; Dessouky, Moawad I.; Ragai, Hani

doi:10.1109/iceec.2004.1374506

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“…where f osc is the carrier frequency, f offset is the frequency offset, P diss is the power consumed by the VCO core, and /(t) is the phase noise simulated at an offset f offset from the carrier [24][25][26].…”

Section: Phase Noise Modelmentioning

confidence: 99%

Modeling and characterization of a 5.2 GHz VCO for UWB applications in 0.13 μm CMOS process

Alazab

2010

Analog Integr Circ Sig Process

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This paper describes a 5.2 GHz voltage-controlled oscillator (VCO) as a key component in RF transceivers. The circuit includes a complementary crosscoupled MOSFET as a negative conductance, beside a tank circuit which consists of an optimal on-chip spiral inductor (L), and an accumulation mode MOS varactor (C(V)). A model for phase noise and figure merit is introduced and verified through simulation in a standard 0.13 lm CMOS process. The VCO core drew a 4.2 mA of current from a 1.2 V power supply and a phase noise of -98.5 dBc/Hz at 1 MHz offset from the 5.2 GHz carrier was calculated. The whole performance of the circuit specifically the tuning range was found to be 26%.

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Section: Phase Noise Modelmentioning

confidence: 99%