Auto-classification and simulation of mask defects using SEM and CAD images

Kang, Tung-Yaw; Lee, Hsin-Chang; Zhang, H.; Yamada, K.; Kitayama, Yasunobu; Kobayashi, Koyo; Fiekowsky, Peter

doi:10.1117/12.801411

Cited by 2 publications

(3 citation statements)

References 5 publications

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“…Although alternative solutions have been actively explored, [1,2] currently, hardware based, AIMS (Aerial Image Measurement System) like equipment is still the tool of choice for mask defect printability check. However, when moving into sub-65nm technology nodes, a new system is needed to match advanced scanners and the existing systems do not have the resolution to resolve some of the features in sub-65nm masks.…”

Section: Introductionmentioning

confidence: 99%

Simulation based mask defect repair verification and disposition

et al. 2009

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As the industry moves towards sub-65nm technology nodes, the mask inspection, with increased sensitivity and shrinking critical defect size, catches more and more nuisance and false defects. Increased defect counts pose great challenges in the post inspection defect classification and disposition: which defect is real defect, and among the real defects, which defect should be repaired and how to verify the post-repair defects.In this paper, we address the challenges in mask defect verification and disposition, in particular, in post repair defect verification by an efficient methodology, using SEM mask defect images, and optical inspection mask defects images (only for verification of phase and transmission related defects).We will demonstrate the flow using programmed mask defects in sub-65nm technology node design. In total 20 types of defects were designed including defects found in typical real circuit environments with 30 different sizes designed for each type. The SEM image was taken for each programmed defect after the test mask was made. Selected defects were repaired and SEM images from the test mask were taken again. Wafers were printed with the test mask before and after repair as defect printability references.A software tool SMDD-Simulation based Mask Defect Disposition-has been used in this study. The software is used to extract edges from the mask SEM images and convert them into polygons to save in GDSII format. Then, the converted polygons from the SEM images were filled with the correct tone to form mask patterns and were merged back into the original GDSII design file. This merge is for the purpose of contour simulation-since normally the SEM images cover only small area (~1 μm) and accurate simulation requires including larger area of optical proximity effect. With lithography process model, the resist contour of area of interest (AOI-the area surrounding a mask defect) can be simulated. If such complicated model is not available, a simple optical model can be used to get simulated aerial image intensity in the AOI. With built-in contour analysis functions, the SMDD software can easily compare the contour (or intensity) differences between defect pattern and normal pattern. With user provided judging criteria, this software can be easily disposition the defect based on contour comparison. In addition, process sensitivity properties, like MEEF and NILS, can be readily obtained in the AOI with a lithography model, which will make mask defect disposition criteria more intelligent.

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Section: Introductionmentioning

confidence: 99%

Simulation based mask defect repair verification and disposition

et al. 2009

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“…Often defect images need to be recaptured at a better resolution. For this, the inspection tool could be reused (online review) or an e-beam inspection is employed [7]. After pruning out a significant fraction of false/nonprintable/noncritical defects, the mask is passed through an aerial imaging tool.…”

Section: A Mask Inspection Primermentioning

confidence: 99%

“…7 The maximum tolerable pinhole defect size is, therefore, determined by poly/contact design rules since it can cause an open contact or transistor. Extrusion defects do have not a significant impact unless they cause a short with another active shape.…”

Section: B Active Layermentioning

confidence: 99%

Design-Aware Mask Inspection

Kagalwalla

Gupta

Progler

et al. 2012

IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

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Abstract-Mask inspection has become a major bottleneck in the manufacturing flow taking up as much as 40% of the total mask manufacturing time. In this paper, we explore techniques to improve the reticle inspection flow by increasing its design awareness. We develop an algorithm to locate nonfunctional features in a postoptical proximity correction layout without using any design information. Using this, and the timing information of the design (if available), the smallest defect size that could cause the design to fail is assigned to each reticle feature. The criticality of various reticle features is then used to partition the reticle such that each partition is inspected at a different pixel size and sensitivity so that the false and nuisance defect count is reduced without missing any critical defect. We also develop an analytical model to estimate the false and nuisance defect count. Using those models, our simulation results show that this designaware mask inspection can reduce the false and nuisance defect count for a critical polysilicon layer from 80 defects down to 49 defects, leading to substantial reduction in defect review load. We also develop a model to estimate first pass yield (FPY) and show that our method can improve the FPY for a polysilicon layer from 11% to 30%. Apart from the polysilicon layer, the potential benefit of this approach is analyzed for active, contact and all the metal/via layers.Index Terms-Computer-aided design (CAD), design for manufacturability (DFM), mask inspection, mask manufacturing, reticle, semiconductor manufacturing.

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Auto-classification and simulation of mask defects using SEM and CAD images

Cited by 2 publications

References 5 publications

Simulation based mask defect repair verification and disposition

Simulation based mask defect repair verification and disposition

Design-Aware Mask Inspection

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