Attainment of low subthreshold slope in planar inversion-channel InGaAs MOSFET with in situ deposited Al₂O₃/Y₂O₃ as a gate dielectric

Abstract

We have demonstrated a record low 85 mV/dec subthreshold slope (SS) at 300 K among the planar inversion-channel InGaAs metal-oxide-semiconductor field-effect transistors (MOSFETs). Our MOSFETs using in-situ deposited Al2O3/Y2O3 as a gate dielectric were fabricated with a self-aligned inversion-channel metal-gate-first process. The temperature-dependent transfer characteristics showed a linear reduction of SS versus temperature, with attainment of an SS of 22 mV/dec at 77 K; the value is comparable to that of the state-of-the-art InGaAs FinFET. The slope factor of SS with temperature (m) is 1.33, which is lower than those reported in the planar InGaAs MOSFETs.

GaAs MOSFETs with in situ Y2O3 dielectric: attainment of nearly thermally limited subthreshold slope and enhanced drain current via accumulation

“…33) In comparison, the previous in situ oxides/InGaAs MOSFETs gave D it values of (9.1-2.8) × 10 12 eV −1 cm −2 . [39][40][41][42][43] The Al 2 O 3 /Y 2 O 3 /GaAs(100) MOSFETs presented in this work further reduced the D it to 4.1 × 10 11 eV −1 cm −2 , which is the lowest D it value among the planar (In)GaAs MOSFETs. We have listed the D it values for all the discussed MOSFETs in Table II.…”

“…[36][37][38] Compared with the aforementioned work using the ex situ high-κ approach, which has to employ complex treatments, the planar inversion-channel MOSFETs using in situ deposited GGO, Al 2 O 3 , HfO 2 , and Y 2 O 3 directly on the freshly grown InGaAs/InP(100) resulted in lower D it values, giving smaller SS values ranging from 128 to 85 mV dec −1 . [39][40][41][42][43] The lowest SS achieved among the planar InGaAs MOSFET configurations was 85 mV dec −1 in Al 2 O 3 /Y 2 O 3 /InGaAs MOSFETs. 43) The current planar D-mode Al 2 O 3 /Y 2 O 3 /GaAs(100) MOSFETs have achieved a record-low SS value of 63 mV dec −1 , surpassing previous achievements in planar (In)GaAs MOSFETs.…”

“…[39][40][41][42][43] The lowest SS achieved among the planar InGaAs MOSFET configurations was 85 mV dec −1 in Al 2 O 3 /Y 2 O 3 /InGaAs MOSFETs. 43) The current planar D-mode Al 2 O 3 /Y 2 O 3 /GaAs(100) MOSFETs have achieved a record-low SS value of 63 mV dec −1 , surpassing previous achievements in planar (In)GaAs MOSFETs.…”

“…Table II summarizes device data from selected publications, highlighting the SS values achieved in (In)GaAs MOSFETs with different dielectric materials and techniques. [29][30][31][32][33][34][35][36][37][38][39][40][41][42][43] We conducted a performance comparison among planar MOSFETs with gate dielectrics in direct contact with the semiconductor channels. In contrast to their planar counterparts, non-planar MOSFETs are designed to enhance electrostatic control.…”

“…The line of C d of 0 μF cm −2 is for the D-mode devices with fully depleted channels (this work) and the enhancement-mode devices using undoped well or semiinsulating substrate, [29][30][31]33) which are denoted with filled symbols. The line of C d of 0.1 μF cm −2 is for the devices with p-well doping of ∼1 × 10 17 cm −3 , where the open symbols with and without dot inside represent GaAs 32) and InGaAs [34][35][36][37][38][39][40][41][42][43] MOSFETs, respectively.…”