Atomic persistence for SCM with a non-intrusive backend controller

Doshi, Kshitij; Giles, Ellis; Varman, Peter

doi:10.1109/hpca.2016.7446055

Cited by 58 publications

(46 citation statements)

References 21 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…e hardware implements "undo logging" by recording the old value of each modi ed cache line. Another hardware solution was presented by Doshi et al (2016). eir system implements "redo logging" but avoids the overhead on reads by not ushing the cache to the NVM before the log is wri en.…”

Section: Related Workmentioning

confidence: 99%

Efficient logging in non-volatile memory by exploiting coherency protocols

Cohen

Friedman

Larus

2017

Proc. ACM Program. Lang.

View full text Add to dashboard Cite

Non-volatile memory (NVM) technologies such as PCM, ReRAM and STT-RAM allow processors to directly write values to persistent storage at speeds that are signi cantly faster than previous durable media such as hard drives or SSDs. Many applications of NVM are constructed on a logging subsystem, which enables operations to appear to execute atomically and facilitates recovery from failures. Writes to NVM, however, pass through a processor's memory system, which can delay and reorder them and can impair the correctness and cost of logging algorithms.Reordering arises because of out-of-order execution in a CPU and the inter-processor cache coherence protocol. By carefully considering the properties of these reorderings, this paper develops a logging protocol that requires only one round trip to non-volatile memory while avoiding expensive computations. We show how to extend the logging protocol to building a persistent set (hash map) that also requires only a single round trip to non-volatile memory for insertion, updating, or deletion.

show abstract

Section: Related Workmentioning

confidence: 99%

Efficient logging in non-volatile memory by exploiting coherency protocols

Cohen

Friedman

Larus

2017

Proc. ACM Program. Lang.

View full text Add to dashboard Cite

show abstract

“…Strand persistency [99] enables the reordering of the commit sequence of transactions for better concurrency (instead of requiring a strict order in which transactions have to be committed). Mechanisms for isolation and concurrency have also been supported by enhancing the memory controller in various ways [23], [116], [126]. A recent work, ThyNVM [105], introduces checkpointing to the DRAM+NVM hybrid persistent memory to overlap application execution and hardware checkpointing, to provide transparent crash consistency.…”

Section: Related Workmentioning

confidence: 99%

Improving the Performance and Endurance of Persistent Memory with Loose-Ordering Consistency

Shu²,

Sun³

et al. 2024

IEEE Trans. Parallel Distrib. Syst.

View full text Add to dashboard Cite

Abstract-Persistent memory provides high-performance data persistence at main memory. Memory writes need to be performed in strict order to satisfy storage consistency requirements and enable correct recovery from system crashes. Unfortunately, adhering to such a strict order significantly degrades system performance and persistent memory endurance. This paper introduces a new mechanism, Loose-Ordering Consistency (LOC), that satisfies the ordering requirements at significantly lower performance and endurance loss. LOC consists of two key techniques. First, Eager Commit eliminates the need to perform a persistent commit record write within a transaction. We do so by ensuring that we can determine the status of all committed transactions during recovery by storing necessary metadata information statically with blocks of data written to memory. Second, Speculative Persistence relaxes the write ordering between transactions by allowing writes to be speculatively written to persistent memory. A speculative write is made visible to software only after its associated transaction commits. To enable this, our mechanism supports the tracking of committed transaction ID and multi-versioning in the CPU cache. Our evaluations show that LOC reduces the average performance overhead of memory persistence from 66.9% to 34.9% and the memory write traffic overhead from 17.1% to 3.4% on a variety of workloads.

show abstract

“…Much of the early work to-date incorporating NVM in systems assumes basic hardware changes. New memory controllers are proposed (Doshi et al 2016;Qureshi et al 2009;Zhou et al 2009). Kiln (Zhao et al 2013) proposes a victim cache for buffering and Atom (Joshi et al 2017) deploys a hardware logging approach to eliminate software logging overhead.…”

Section: 2 Backgroundmentioning

confidence: 99%

Virtualize and share non-volatile memories in user space

et al. 2020

View full text Add to dashboard Cite

Emerging non-volatile memory (NVM) has attractive characteristics such as DRAM-like low-latency together with the non-volatility of storage devices. Recently, byte-addressable, memory bus-attached NVM has become available. This paper addresses the problem of combining a smaller, faster byte-addressable NVM with a larger, slower storage device, such as SSD, to create the impression of a larger and faster byte-addressable NVM which can be shared across multiple applications concurrently. In this paper, we propose vNVML, a user space library for virtualizing and sharing NVM. vNVML provides for applications transaction-like memory semantics that ensures write ordering, durability, and persistency guarantees across system failures. vNVML exploits DRAM for read caching to improve performance and potentially to reduce the number of writes to NVM, extending the NVM lifetime. vNVML is implemented in C and evaluated with realistic workloads to show that vNVML allows applications to share NVM efficiently, both in a single OS and when docker-like containers are employed. The results from the evaluation show that vNVML incurs less than 10% overhead while providing the benefits of an expanded virtualized NVM space to the applications, and allowing applications to safely share the virtual NVM.

show abstract

Atomic persistence for SCM with a non-intrusive backend controller

Cited by 58 publications

References 21 publications

Efficient logging in non-volatile memory by exploiting coherency protocols

Efficient logging in non-volatile memory by exploiting coherency protocols

Improving the Performance and Endurance of Persistent Memory with Loose-Ordering Consistency

Virtualize and share non-volatile memories in user space

Contact Info

Product

Resources

About