2019
DOI: 10.1016/j.apsusc.2019.143689
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Atomic layer deposition growth of SnS2 films on diluted buffered oxide etchant solution-treated substrate

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Cited by 14 publications
(17 citation statements)
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“…The FETs exhibited high I on /I off ratios up to 8.3 × 10 6 , whereas their mobilities were still relatively low, 0.06 and 0.08 cm 2 V −1 s −1 for the 4 and 6 ML films (Figure 11j). In a very recent study, Lee et al [243] observed that a buffered oxide etch (BOE) treatment of SiO 2 substrates afforded slight improvements in the FET performance, i.e., a mobility of 0.31 cm 2 V −1 s −1 and an I on /I off ratio of 6.5 × 10 5 compared to 0.22 cm 2 V −1 s −1 and 2.9 × 10 5 on bare SiO 2 . However, due to an increased growth rate, the film grown on BOE-treated SiO 2 was 10 ML thick compared to 7 ML on bare SiO 2 , which can also affect its performance.…”
Section: Field-effect Transistorsmentioning
confidence: 94%
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“…The FETs exhibited high I on /I off ratios up to 8.3 × 10 6 , whereas their mobilities were still relatively low, 0.06 and 0.08 cm 2 V −1 s −1 for the 4 and 6 ML films (Figure 11j). In a very recent study, Lee et al [243] observed that a buffered oxide etch (BOE) treatment of SiO 2 substrates afforded slight improvements in the FET performance, i.e., a mobility of 0.31 cm 2 V −1 s −1 and an I on /I off ratio of 6.5 × 10 5 compared to 0.22 cm 2 V −1 s −1 and 2.9 × 10 5 on bare SiO 2 . However, due to an increased growth rate, the film grown on BOE-treated SiO 2 was 10 ML thick compared to 7 ML on bare SiO 2 , which can also affect its performance.…”
Section: Field-effect Transistorsmentioning
confidence: 94%
“…partly cryst, ann. ≈10-20 nm) FET [243] 2020 [244] 150 (100 to 350 (multistep), H 2 S) ≈50 nm rough films (≈50 nm) Gas sensor [245] 150 (100 to 350 (multistep), H 2 S) 6 ML films (as-dep. ?, ann.…”
mentioning
confidence: 99%
“…However, a low growth temperature is unfavorable for the formation of thermodynamically stable products and defects, and disorder is usually common in lowtemperature growth, which can degrade their electrical properties. Lee et al 153 grew SnS 2 films using Sn(NMe 2 ) 4 and H 2 S at 150 °C and applied multi-step post-growth annealing at 350 °C in a H 2 S environment to improve the crystallinity. Mattinen et al 51 developed an ALD process combined with lower temperature (250 °C) post-deposition annealing by using a new Sn source Sn(OAc) 4 .…”
Section: Synthesismentioning
confidence: 99%
“…Tin disulfide (SnS 2 ) is an intrinsic n‐type semiconductor with a bandgap of 2.1 eV, larger than that of monolayer MoS 2 . [ 272 ] The high bandgap suppresses source/drain tunneling in FETs, affording a high I ON / I OFF of 10 8 . [ 273 ] Furthermore, large electron mobility (230 cm 2 V −1 s −1 ) was demonstrated using adsorbate‐suppressing conditions, indicating its potential for applications in FETs.…”
Section: Ald Of Metal Chalcogenides For Fetsmentioning
confidence: 99%