Assessment of PCB pad cratering resistance by joint level testing

Roggeman, Brian; Børgesen, Peter; Li, Jing; Godbole, G.; Tumne, Pushkraj; Srihari, K.; Levo, T.; Pitarresi, James M.

doi:10.1109/ectc.2008.4550081

Cited by 22 publications

(12 citation statements)

References 2 publications

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“…Figure 9 shows the average cycles to fail versus the load applied, which is approximated by a powerlaw relationship given below. 2 1 D L D Nf  (5) In this relationship, Nf is the average cycles to fail, L is the applied load in grams, D 1 and D 2 are constants, and are equal to 3E36 and -13, respectively. While this has the same form as equation (4), the constants, especially the exponent, are different.…”

Section: Pad Level Testingmentioning

confidence: 99%

“…Figure 11. Pad cratering [5] with crack initiating at the trace When the board deflects during drop test, the stress distribution for each interconnect varies with time and space. The stress increases as the element size decreases.…”

Section: Stress Approach To Predict the Impact Lifementioning

confidence: 99%

“…Because all failures in drop test were pad cratering, joint level testing was used to determine the strength and fatigue resistance of the PCB pads [5]. First, pad strength was measured by using the Cold Bump Pull technique, at a speed of 1mm/s.…”

Section: Pad Level Testingmentioning

confidence: 99%

“…Pitarresi [3] and Lall [4] addressed the dynamic responses of test vehicle at various loading conditions and solder joint reliability in electronics under shock and vibration using explicit finite element submodeling respectively. Recent work by Roggeman [5] was focused on critical failure mode as pad cratering.…”

Section: Introductionmentioning

confidence: 99%

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Board level energy correlation and interconnect reliability modeling under drop impact

Agrawal

Levo

Pitarresi

et al. 2009

2009 59th Electronic Components and Technology Conference

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Portable products as well as some larger products may see failures by a high strain rate mechanical loading like that seen in a high or low level drop/shock event. Within the portable product industry there is a wide range of product design, usage and loading conditions. Because of this, standards such as JEDEC, which is meant to generate comparative results addressing component reliability, do little or nothing to generalize the reliability of specific assemblies. To do this we need to consider both failure rates and failure mechanisms to better understand how specific loading conditions affect the failure of an assembly.A standard JEDEC style test board was assembled with BGA components and then drop tested with an input of various energy levels. Pad cratering was the failure mode for all assemblies. This allowed for an independent investigation into this one failure mode. During the drop test the energy from the impact event is transferred into the board, which causes a response. A comparison between the response energy and the input energy was made and, for this particular test assembly, the input correlated to the response reasonably well. Upon further investigation it was found that the failure rates correlated well to the energy levels at which it was tested. This allowed for the development of a predictive model based on these empirical results. With the failure mode of all assemblies being pad cratering on the PCB side of the solder joint it allowed for an investigation into the response of individual pads. The fatigue resistance and strength of the PCB pads was measured using pad-level testing techniques. By measuring the fatigue resistance as a function of a fixed load, it was possible to develop an S-N curve for this particular test vehicle. From this it was found that the pad lifetime is also highly dependent on the input level, as was seen in the drop testing of this test vehicle.This study also proposes a method to compare the input energy and the response energy of the board computed using the finite element method. Good correlation between the measured response energy and the simulated response energy has been achieved. A lifetime predictive model has been developed using the simulated response energy. Furthermore, 3D FEA model has been established using ANSYS implicit solver with consideration of detailed copper pad, trace and solder joint design to describe the dynamic behavior of PCB assembly and to predict the location of failure and failure mode after impact. For correlation studies, the maximum volume average Von Mises stress of PCB-pad interface at critical solder joint location is calculated and correlated well with the N 63 impact lives measured during the drop test. This was used to develop an impact life prediction model. Nanoindentation technique is used to measure the material properties of copper trace. In addition to solder joint dimensions and material properties, many other factors, including trace dimensions, component size and PCB thickness were also simulated to investigate th...

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Section: Pad Level Testingmentioning

confidence: 99%

Section: Stress Approach To Predict the Impact Lifementioning

confidence: 99%

Section: Pad Level Testingmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

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Board level energy correlation and interconnect reliability modeling under drop impact

Agrawal

Levo

Pitarresi

et al. 2009

2009 59th Electronic Components and Technology Conference

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“…In many cases, this loading is applied at a very high strain rate, such as due to drop/impact, which can result in a failure of the intermetallic layer or by pad cratering [1]. Board-level drop testing is one of the current industry standards to assess reliability of a portable electronics under high strain rate conditions [2].…”

Section: Introductionmentioning

confidence: 99%

Comparison of joint level impact fatigue resistance and board level drop test

Guruprasad

Pitarresi

2009

2009 59th Electronic Components and Technology Conference

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The purpose of the present study is to investigate the behavior of solder joints under high strain rate repeated loading during micro-impact testing. SAC 105 and SAC 305 solder alloys on electrolytic nickel-gold and copper-OSP pads were used in this study. In doing so, the dependency on factors such as impact energy and solder alloy was studied.In terms of solder alloy, lower silver containing tin-silvercopper based alloys are beneficial in high strain rate cyclic loading due to the increased ductility of the alloy. The majority of the failures observed on the SAC305 assemblies were intermetallic fracture, while the SAC105 assemblies exhibited mostly solder failure modes. As the strain rate decreased, failure modes transitioned from brittle to ductile failure for the SAC305 assemblies. This transition was not the same for the two alloys.Reliability in board-level drop testing was compared to the results obtained from the micro-impact fatigue testing. Assemblies built using SAC105 tended to outlast SAC305 assemblies, due to the increased ductility of the lower Ag containing solder. Failure modes correlated well between drop testing and joint level impact fatigue testing. It was found that the impact energy was a useful metric in determining the reliability of the solder joint.

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