Assessing, Controlling and Understanding Parameter Variations of SiC Power MOSFETs in Switching Operation

Abstract

Semiconductor manufacturers and researchers have recently revealed that under specific bipolar gate switching conditions SiC MOSFETs exhibit parameter drift dynamics different from those typically observed in static qualification stress tests. In response to this finding, we present an approach for assessing the worst-case drift of data-sheet-relevant electrical parameters in a simple and transparent manner for a large variety of application profiles. We also introduce an empirical model that may explain the drift dynamics observed under gate switching stress; and discuss a recently developed interface characterization technique that has the potential to reveal the nature of point defects at the SiC/SiO2 interface presumably related to the gate switching instability in SiC MOSFETs.

Gate Switching Instability in Silicon Carbide MOSFETs—Part II: Modeling

“…Based on the characteristic features of GSI summarized in Part I, the similarities to charge pumping (CP) experiments, and previously sketched modeling ideas [11], [12], [13], we construct a defect-agnostic mathematical model. First, we need defects of type A, which are pumped during GSI and at which site the pumped energy is released in the form of recombination events.…”

“…While some models have been previously proposed, these were based on some form of local electric-field enhancement and subsequently increased charge trapping [9], [10]. However, as discussed in Part I, GSI does not result in the creation of fixed charges but predominantly creates active defects close to the conduction band of SiC [11], [12]. Based on these observations, in the following, we will develop a physics-based model, study its behavior numerically, develop a closed form analytic solution, and eventually validate the model against detailed experimental data.…”