Aspect Ratio Impact on RF and DC Performance of State-of-the-Art Short-Channel GaN and InGaAs HEMTs

Guerra, Diego; Akis, R.; Marino, Fabio Alessio; Ferry, D. K.; Goodnick, Stephen M.; Saraniti, Marco

doi:10.1109/led.2010.2066954

Cited by 35 publications

(19 citation statements)

References 17 publications

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“…This is because of the non optimized layer structure of 50 nm gate length device [21]. It has been reported [25] that InGaAs HEMTs perform well for aspect ratio value 7.5 and 4-5 for negligible and reduced short-channel effects and as defined above, the aspect ratio for 50 nm DGHEMT is below 4 (i.e. ( L g /a = 2.27 < 4)) and therefore suffers from short channel effects.…”

Section: Resultsmentioning

confidence: 97%

Quantum Modeling of Nanoscale Symmetric Double-Gate InAlAs/InGaAs/InP HEMT

Verma¹,

Gupta²,

Gupta³

et al. 2013

JSTS:Journal of Semiconductor Technology and Science

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Abstract-The aim of this work is to investigate and study the quantum effects in the modeling of nanoscale symmetric double-gate InAlAs/InGaAs/InP HEMT (High Electron Mobility Transistor). In order to do so, the carrier concentration in InGaAs channel at gate lengths (L g ) 100 nm and 50 nm, are modelled by a density gradient model or quantum moments model. The simulated results obtained from the quantum moments model are compared with the available experimental results to show the accuracy and also with a semi-classical model to show the need for quantum modeling. Quantum modeling shows major variation in electron concentration profiles and affects the device characteristics. The two triangular quantum wells predicted by the semi-classical model seem to vanish in the quantum model as bulk inversion takes place. The quantum effects thus become essential to incorporate in nanoscale heterostructure device modeling.

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Section: Resultsmentioning

confidence: 97%

Quantum Modeling of Nanoscale Symmetric Double-Gate InAlAs/InGaAs/InP HEMT

Verma¹,

Gupta²,

Gupta³

et al. 2013

JSTS:Journal of Semiconductor Technology and Science

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“…It has a direct effect on the DC and RF characteristics. To suppress the short channel effect, a critical aspect ratio has to be held to suppress the short channel effect [17,18] . Hence, in order to hold the device aspect ratio high to avoid the short channel effect and improve high RF performance in nanometer scale gate length, the vertical dimension of the device is necessary to be scaled.…”

Section: Simulation Results and Discussionmentioning

confidence: 99%

Numerical study for enhancement-mode AlN/GaN/AlN N-polar MISFET with self-aligned source/drain regions

Wei¹,

Li²

2014

Proceedings of the International Conference on Logistics, Engineering, Management and Computer Science

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Abstract-In this work, for the first time, the electrical characteristic of the enhancement-mode (E-mode) N-polar GaN metal-insulator-semiconductor field effect transistor with self-aligned source/drain regions is investigated by SILVACO TCAD software. Macroscopic polarization effect of III-V nitrides are included and are used to realize the Emode operation. Numerical study results show that E-mode N-polar GaN transistor can keep E-mode operation at the gate length of 0.62 μm, and the simulation result is in accordance with the experimental report result. As the gate length decreases, the short channel effect becomes severe and is able to change this E-mode device to depletion mode operation. The introduction of the vertical scaling technique is beneficial to suppress short channel effect to maintain the E-mode operation even if the gate length scales to below 100nm gate length. This detailed study in N-polar GaNbased transistors establishes technological base for further development of field effect devices based on N-polar IIInitrides..

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“…This would also favour high speed operation and mitigate short-channel effects. 12, 13 Gonschorek et al has reported a 2DEG density up to 1.7 × 10 13 cm −2 on a lattice matched InAlN/GaN device with a 6 nm barrier thickness. 14 In power control applications and digital circuits 15 , depletion-mode (D-mode) HEMT devices are not optimal due to the fact that when the gate is unbiased a short circuit is present between source and drain which could cause safety issues in the event of a circuit failure.…”

Section: Introductionmentioning

confidence: 99%

“…A number of approaches have been developed to obtain E-mode operation: for instance, a p-type GaN layer deposited on top of the AlGaN barrier under the gate 16,17 ; a recessed gate in which the barrier is thinned under the gate to deplete the 2DEG [18][19][20] ; and an implanted gate where atoms with large electronegativity, such as fluorine (F), are incorporated into the barrier, again to deplete the 2DEG. [11][12][13]15,[21][22][23][24][25] Each technique has its own associated advantages and drawbacks. In the recessed-gate thinning approach, the barrier depletes the 2DEG under the gate and thus shifts the threshold voltage in the positive direction, but at the same time it also reduces the mobility of carriers under the gate, resulting in a low drain current.…”

Section: Introductionmentioning

confidence: 99%

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

Tang

Lee

Guiney

et al. 2018

Journal of Applied Physics

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We investigate the impact of a fluorine plasma treatment used to obtain enhancement-mode operation on the structure and chemistry at the nanometer and atomic scales of an InAlN/GaN field effect transistor. The fluorine plasma treatment is successful in that enhancement mode operation is achieved with a +2.8 V threshold voltage. However, the InAlN barrier layers are observed to have been damaged by the fluorine treatment with their thickness being reduced by up to 50%. The treatment also led to oxygen incorporation within the InAlN barrier layers. Furthermore, even in the as-grown structure, Ga was unintentionally incorporated during the growth of the InAlN barrier. The impact of both the reduced barrier thickness and the incorporated Ga within the barrier on the transistor properties has been evaluated theoretically and compared to the experimentally determined two-dimensional electron gas density and threshold voltage of the transistor. For devices without fluorine treatment, the two-dimensional electron gas density is better predicted if the quaternary nature of the barrier is taken into account. For the fluorine treated device, not only the changes to the barrier layer thickness and composition, but also the fluorine doping needs to be considered to predict device performance. These studies reveal the factors influencing the performance of these specific transistor structures and highlight the strengths of the applied nanoscale characterisation techniques in revealing information relevant to device performance.

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Aspect Ratio Impact on RF and DC Performance of State-of-the-Art Short-Channel GaN and InGaAs HEMTs

Cited by 35 publications

References 17 publications

Quantum Modeling of Nanoscale Symmetric Double-Gate InAlAs/InGaAs/InP HEMT

Quantum Modeling of Nanoscale Symmetric Double-Gate InAlAs/InGaAs/InP HEMT

Numerical study for enhancement-mode AlN/GaN/AlN N-polar MISFET with self-aligned source/drain regions

Nanoscale structural and chemical analysis of F-implanted enhancement-mode InAlN/GaN heterostructure field effect transistors

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