ASIC package design optimization for 10 Gbps and above backplane serdes links

Design of package BGA pin-out for >25Gb/s high speed SerDes considering PCB via crosstalk

“…For each pattern, total five surrounding aggressors are considered, and the arrangement of the signal and ground vias are shown along with the signal trace escaped from the package to the board. Pattern 1 has been proposed in [2] and is served as the baseline design in this study. It has 1:1 signal-to-ground (S:G) ratio and outperform other FEXT patterns proposed in [2] for 15Gb/s data rate.…”

“…Pattern 1 has been proposed in [2] and is served as the baseline design in this study. It has 1:1 signal-to-ground (S:G) ratio and outperform other FEXT patterns proposed in [2] for 15Gb/s data rate. As shown in Fig.…”

“…To achieve it, application-specific integrated circuit (ASIC) with integrated multi-gigabit high speed serial link transceivers is widely used due to the advantage of its high performance and high reliability, small volume and light weight, and relative low power consumption [2]. Standards such as OIF CEI-25G, CEI-28G and 32G-FC [3], [4] require those transceivers to operate at high data rates over imperfect channels with extra insertion loss, impedance discontinuities [5], [6], power supply noises, and the crosstalk.…”

“…Since BGA ball pitch is fixed, increasing distance between signals is not feasible. Thus, the most frequent way is adding ground balls around important signals so that PCB also has shielding ground vias around signals [2]. Nevertheless, it is difficult to achieve perfect shielding and, beyond via-via coupling, trace-via and via-trace coupling also play important roles in determining the crosstalk performance.…”

ASIC package to board BGA discontinuity characterization in >10Gbps SerDes links

“…INTRODUCTION ASIC (Application-Specific Integrated Circuit) is widely used in high-end networking products due to the advantage of high performance and high reliability, small volume and light weight, and low power consumption when compared with the corresponding standard IC (Integrated Circuit) solutions, as well as IP (Intellectual Property) protection. The ASICs used in Cisco data center switch products typically have many high-speed serial interfaces with data rates keep going up to beyond 10Gbps [1]. The SerDes (Serializer Deserializer) typically requires advance signal equalization features like FFE (Feed Forward Equalization), DFE (Decision Feedback Equalization) and crosstalk management, may also require the help of eye opener devices in the channel.…”