Artificial semiconductor/insulator superlattice channel structure for high-performance oxide thin-film transistors

Abstract

High-performance thin-film transistors (TFTs) are the fundamental building blocks in realizing the potential applications of the next-generation displays. Atomically controlled superlattice structures are expected to induce advanced electric and optical performance due to two-dimensional electron gas system, resulting in high-electron mobility transistors. Here, we have utilized a semiconductor/insulator superlattice channel structure comprising of ZnO/Al2O3 layers to realize high-performance TFTs. The TFT with ZnO (5 nm)/Al2O3 (3.6 nm) superlattice channel structure exhibited high field effect mobility of 27.8 cm2/Vs, and threshold voltage shift of only < 0.5 V under positive/negative gate bias stress test during 2 hours. These properties showed extremely improved TFT performance, compared to ZnO TFTs. The enhanced field effect mobility and stability obtained for the superlattice TFT devices were explained on the basis of layer-by-layer growth mode, improved crystalline nature of the channel layers, and passivation effect of Al2O3 layers.

Heterojunction oxide thin-film transistors with unprecedented electron mobility grown from solution

“…However, these archetypal devices rely on complex manufacturing and involve elaborate multilayered architectures ( 21 , 22 ). Thus, a major challenge in further advancing the performance of metal oxide TFTs lies in the development of high-quality oxide heterostructures via scalable manufacturing processes ( 7 ).…”

High Electron Mobility Thin‐Film Transistors Based on Solution‐Processed Semiconducting Metal Oxide Heterojunctions and Quasi‐Superlattices

“…A summary of the field‐effect electron mobility values reported in recent years for different metal oxide heterointerface systems grown by different methods (e.g., sputtering, molecular beam epitaxy (MBE), metalorganic chemical vapor deposition (MOCVD), and atomic layer deposition (ALD) techniques) is given in Table S1 (Supporting Information). Despite these very promising early results and the tremendous potential of the 2DEG transistor technology, however, its widespread adoption in practical electronic applications is currently hampered by the rather complex23 and high temperature (600–900 °C, see Table S1, Supporting Information) manufacturing processes often required in order to ensure the formation of the all‐important high‐quality heterointerface 19, 24, 25. Because of the latter requirement it is not a trivial question whether high‐quality oxide heterointerfaces can be realized using simpler, cost‐efficient, and high‐throughput fabrication methods that are compatible with existing semiconductor fabrication processes (e.g., solution‐based) and even perhaps temperature‐sensitive substrate materials such as plastic.…”

Contributions of strain relaxation and interface modes to thermal transport in superlattices

“…Superlattices have shown promise for applications such as thermoelectric devices [1], semiconductor lasers [2,3], and transistors [4]. For these applications, thermal management is often important to performance and reliability; in the case of thermoelectric devices, heat transfer is key to fundamental operation.…”