Area Targeted Minimization Method of Finite State Machines for FPGA Devices

Klimowicz, Adam

doi:10.1007/978-3-319-99954-8_31

Cited by 2 publications

(1 citation statement)

References 9 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The implementation cost is not a critical boundary because contemporary FPGA devices have a large number of logical elements. For this reason, the area parameter is not considered in this work, but it was investigated in earlier works [34].…”

mentioning

confidence: 99%

State Merging and Splitting Strategies for Finite State Machines Implemented in FPGA

Klimowicz

Salauyou

2022

Applied Sciences

View full text Add to dashboard Cite

Different strategies for the combination of merging and splitting transformation procedures for incompletely specified finite state machines implemented on field-programmable logic devices are offered. In these methods, such optimization criteria as the speed of operation, power consumption and implementation cost are considered already in the early phase of finite state machine synthesis. The methods also take into account the technological features of programmable logic devices and the state assignment method. The transformation quality ratio is calculated on the base of estimations of consumed power, critical path delay and number of utilized logic cells. The user is also able to choose the order of merging and splitting procedures and the direction of the optimization by setting weights for each criterion. The methods of the estimation of optimization criteria values are described, and the experimental results are also discussed.

show abstract

mentioning

confidence: 99%