Area- Efficient VLSI Implementation of Serial-In Parallel-Out Multiplier Using Polynomial Representation in Finite Field GF(2m)

Nabipour, Saeideh; Fatin, Gholamreza Zare; Javidan, Javad

doi:10.48550/arxiv.2007.08284

2020

DOI: 10.48550/arxiv.2007.08284

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Area- Efficient VLSI Implementation of Serial-In Parallel-Out Multiplier Using Polynomial Representation in Finite Field GF(2m)

Saeideh Nabipour¹,

Gholamreza Zare Fatin²,

Javad Javidan³

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Area- Efficient VLSI Implementation of Serial-In Parallel-Out Multiplier Using Polynomial Representation in Finite Field GF(2m)

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