“…An analytic expression for the maximum lower-cut-off frequency is obtained for a given data rate (DR) bit pattern and allowed sensitivity deterioration [7]. At present, the most common OC system is based on RC low-pass filter (LPF) [8][9][10][11][12], that suffers from several drawbacks such as extremely high area, power consumption dependent residual offset, stability and fixed lower-cut-off frequency. Some of these issues are dealt by the switched-capacitor (S-C) LPF based systems [8,13,14].…”
Offset compensation (OC) systems are indispensable parts of multi-Gbit/s optical receiver (RX) frontends. Effects of offset are addressed in this chapter. The analytical expression for the highest lowercut-off frequency of the OC with minimum impact on the sensitivity is found. Existing OC solutions are discussed. Then, a novel mixed-signal (MS) architecture is introduced which uses digital filtering of the signal, and current-digital-to-analog converters to compensate the static offset in the limiting amplifier. In the transimpedance amplifier both static and dynamic offset are compensated. By using two feedback loops and a continuous tracking the presented solution offers more functionality than other existing MS architectures. Three RX implementations, with RC, switched-capacitor (S-C) and with the MS-OC architectures, in the same 28 nm bulk-CMOS are compared quantitatively with measurements. The presented MS design reaches a lower-cut-off frequency of under 9 kHz, a dynamic range of over 1 mA, 3.2 µA residual input offset-current and it is compensating the RX via two feedback loops. The presented system offers a higher flexibility and functionality in implementation, as well as a very good compromise between area, precision and performance over the commonly used RC-filter and S-C filter based solutions.
“…An analytic expression for the maximum lower-cut-off frequency is obtained for a given data rate (DR) bit pattern and allowed sensitivity deterioration [7]. At present, the most common OC system is based on RC low-pass filter (LPF) [8][9][10][11][12], that suffers from several drawbacks such as extremely high area, power consumption dependent residual offset, stability and fixed lower-cut-off frequency. Some of these issues are dealt by the switched-capacitor (S-C) LPF based systems [8,13,14].…”
Offset compensation (OC) systems are indispensable parts of multi-Gbit/s optical receiver (RX) frontends. Effects of offset are addressed in this chapter. The analytical expression for the highest lowercut-off frequency of the OC with minimum impact on the sensitivity is found. Existing OC solutions are discussed. Then, a novel mixed-signal (MS) architecture is introduced which uses digital filtering of the signal, and current-digital-to-analog converters to compensate the static offset in the limiting amplifier. In the transimpedance amplifier both static and dynamic offset are compensated. By using two feedback loops and a continuous tracking the presented solution offers more functionality than other existing MS architectures. Three RX implementations, with RC, switched-capacitor (S-C) and with the MS-OC architectures, in the same 28 nm bulk-CMOS are compared quantitatively with measurements. The presented MS design reaches a lower-cut-off frequency of under 9 kHz, a dynamic range of over 1 mA, 3.2 µA residual input offset-current and it is compensating the RX via two feedback loops. The presented system offers a higher flexibility and functionality in implementation, as well as a very good compromise between area, precision and performance over the commonly used RC-filter and S-C filter based solutions.
“…All these feedback mechanisms use an RC filter. However, as it is shown in [18], a switched-capacitor (SC) filter needs a much smaller area. Fig.…”
Section: Design Of the Optical Receivermentioning
confidence: 99%
“…A LPF in the SC technique is used to extract the CM of v outRX − as in [18]. The residual offset can be approximated by V os , res = V os /(1 + A v , RX + A v , OPA ), which means that A v , OPA should be maximized.…”
The design of an analog frontend including a receiver amplifier (RX) and laser diode driver (LDD) for optical communication system is described. The RX consists of a transimpedance amplifier, a limiting amplifier, and an output buffer (BUF). An offset compensation and common-mode control circuit is designed using switched-capacitor technique to save chip area, provides continuous reduction of the offset in the RX. Active-peaking methods are used to enhance the bandwidth and gain. The very low gate-oxide breakdown voltage of transistors in deep sub-micron technologies is overcome in the LDD by implementing a topology which has the amplifier placed in a floating well. It comprises a level shifter, a pre-amplifier, and the driver stage. The single-chip frontend, fabricated in a 28 nm bulk-digital complementary metal–oxide–semiconductor (CMOS) process has a total active area of 0.003 mm2, is among the smallest optical frontends. Without the BUF, which consumes 8 mW from a separate supply, the RX power consumption is 21 mW, while the LDD consumes 32 mW. Small-signal gain and bandwidth are measured. A photo diode and laser diode are bonded to the chip on a test-printed circuit board. Electro-optical measurements show an error-free detection with a bit error rate of 10−12at 20 Gbit/s of the RX at and a 25 Gbit/s transmission of the LDD.
“…This DC component is extracted with the active RC low-pass filter composed by the OPAMP, R L and C L . In order to minimize the difference, the OPAMP regulates the negative input of the LA [6]. In contrast with solutions where an external capacitor is used [7], in this case an additional pad is saved and the complete circuit can be integrated on the same SoC.…”
Section: Offset Correction and Common Mode Controlmentioning
This paper presents the design, electrical and optical measurements of a receiver for optical communications in 28 nm CMOS. Electrical measurements show an error-free transmission with a bit error rate (BER) of 10 -12 up to 20 Gbps. Inductor-less peaking methods are used, thus the circuit is very compact. With only 0.0025 mm 2 , 13.6 mW power consumption, yielding 0.68 pJ/bit it is one of the smallest and most energy efficient receiver to this date for 20 Gbps data rate (DR). The receiver was bonded to a printed circuit board (PCB) and to a 14 Gbps, 850 nm photo diode. An error-free transmission over the optical link was obtained up to 17 Gbps with an input optical sensitivity of -4.3 dBm. The measured sensitivity at 15 Gbps is just -7.5 dBm and -8.4 dBm for 10 Gbps.
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