Area Efficient Memoryless Reverse Converter for New Four Moduli Set {2n−1,2n−1,2n+1,22n+1−1}

Abstract

The efficiency of residue number system depends on the reverse converter due to several modulo operations like addition, subtraction and multiplication. In this paper, a design of new four moduli set [Formula: see text], reverse converter is presented. The moduli set have moduli with length ranging from ([Formula: see text]) to ([Formula: see text])-bits. The reverse conversion for moduli set [Formula: see text] has been optimized in existing state of art. Thus, proposed converter is based on two new moduli set [Formula: see text] and utilizes the mixed radix conversion. This converter is memoryless, and occupies least area. The proposed converter is based on carry save adder (CSA) and modulo adder enabling more speed and less hardware complexity for dynamic range of [Formula: see text]-bit, offering good area-delay product.

Energy-Efficient Residue-to-Binary Conversion Based on a Modulo-Adder-Free Architecture

“…It can be seen that the proposed design outperforms all of state-of-the art designs in term of number of required LUTs. Besides, it has higher speed than [8][9][10]. V. CONCLUSIONS This paper proposed a novel modulo-adder-free architecture to design reverse converters for the arithmeticfriendly moduli set {2 n+k , 2 2n+1 -1, 2 n +1, 2 n -1}.…”

“…Therefore, researchers have been investigated methods and techniques to mitigate this negative impact avoiding as much as it is possible modular adders in reverse converter architectures. On the other hand, the new Chinese Remainder Theorems (New CRTs) have allowed to simplify reverse conversion formulation reaching more efficient hardware implementations [8][9][10][11][12]. Besides, mixed-radix conversion (MRC) is another useful approach for designing reverse converters [1,2].…”

Design and analysis of RNS-based sign detector for moduli set {2^n, 2^n - 1, 2^n + 1}

“…For all such applications, RNS provides outstanding performance with high computational speed, lesser area, and low power dissipation, which are the major objective of today's real-time processors. Additionally, the reverse conversion [15][16][17], division [18][19], scalar [20], magnitude comparison [21][22], overflow detection [23][24][25] and sign detection [26][27][28][29][30][31][32][33][34][35][36][37] are also the essential operation of RNS. These operations are not easy to perform in RNS.…”