Architectural evaluation of 3D stacked RRAM caches

Abstract

The first memristor, originally theorized by Dr. Leon Chua in 1971, was identified by a team at HP Labs in 2008. This new fundamental circuit element is unique in that its resistance changes as current passes through it, giving the device a memory of the past system state. The immediately obvious application of such a device is in a non-volatile memory, wherein high-and low-resistance states are used to store binary values. A memory array of memristors forms what is called a resistive RAM or RRAM. In this paper, we survey the memristors that have been produced by a number of different research teams and present a point-by-point comparison between DRAM and this new RRAM, based on both existent and expected near-term memristor devices.In particular, we consider the case of a die-stacked 3D memory that is integrated onto a logic die and evaluate which memory is best suited for the job. While still suffering a few shortcomings, RRAM proves itself a very interesting design alternative to well-established DRAM technologies.

Memory and Storage System Design with Nonvolatile Memory Technologies

“…In contrast, when a negative voltage is applied across the cell, a RESET process leads to the rupture of the CFs, causing the cell into HRS. Table 1 compares NVMs [13], [14], [15], [16], [17], [18] with traditional memory and storage technologies, in terms of performance, energy, density, and endurance. Benefits: NVMs promise superior density, performance, and energy characteristics compared with traditional memory technologies.…”

“…Two of the NVM technologies, PCM and ReRAM, have limited endurance [23], [24] that is much lower than SRAM and DRAM (STT-MRAM has near-SRAM endurance at 10 15 [25], hence its endurance is less of an issue). The endurance of existing PCM implementations is in the range of c 2015 Information Processing Society of Japan Table 1 Comparison of traditional memory and NVM technologies [13], [14], [15], [16], [17], [18]. [31], which transfers data at a speed comparable to current DDR3-1600 DRAM.…”

Hardware trust implications of 3-D integration

“…A storage dependency is a type of resource creation and provision dependency that is specific to memory, both on-chip and off-chip. Storage dependencies can be mitigated by implementing the storage in the control plane [8,16,29,35]. …”

Dynamic Reference Scheme with Improved Read Voltage Margin for Compensating Cell-position and Background-pattern Dependencies in Pure Memristor Array

“…One more advantage of memristors is a possibility that can be implemented by pure memristor array not using any selection devices such as diodes and transistors [8,9]. This pure memristor array without any selection devices can be very suitable to 3-D integration, because transistors and diodes are much more difficult to be stacked layer by layer, compared to pure memristor array [10][11][12][13][14].…”