Approach to CD-SEM metrology utilizing the full waveform signal

McIntosh, John M.; Kane, B.C.; Bindell, Jeffery B.; Vartuli, Catherine B.

doi:10.1117/12.308759

Cited by 14 publications

(9 citation statements)

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“…Such that, by examining different parts of the waveform, deviations in shape can be separated from deviations in scale. However, no absolute correlation between the MPC value and the topography of the sample surface has been found yet [11].…”

Section: Related Workmentioning

confidence: 95%

Wafer surface reconstruction from top–down scanning electron microscope images

Gelenbe

Koçak

Wang

2004

Microelectronic Engineering

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Section: Related Workmentioning

confidence: 95%

Wafer surface reconstruction from top–down scanning electron microscope images

Gelenbe

Koçak

Wang

2004

Microelectronic Engineering

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“…Research on this approach, however, has found no absolute correlation existing between the MPC value and the topography of the sample surface. 3 In our research, we continue to adopt the currently accepted viewpoint in which the top down CD-SEM intensity signal is a waveform that implicitly defines the edge features, and information regarding the topography of a feature can be derived by analyzing it, In particular, extraction of edge position from an intensity waveform is an important step. Our interest is not only to detect edge positions but also to obtain topography of a feature.…”

Section: Top Down Critical Dimension Sem Imagesmentioning

confidence: 99%

“…2 The shape and size of the PR at the submicron level is largely responsible for the quality of the protected substrate. 3 In the mass production environment of semiconductor devices, a metrology related failure may cause unacceptably low level of yield; therefore, it is extremely important to monitor the pattern transfer process to determine any defective PR shape before the final etching and production steps.4'5 A defective PR shape may be caused by over-exposure or under-exposure.…”

Section: Introduction 1microlithography In Integrated Circuit Fabricmentioning

confidence: 99%

<title>Evaluating neural network reconstruction of wafer profile from electron microscopy</title>

Gelenbe

Wang

2001

SPIE Proceedings

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Ill this paper we apply neural network techniques and physically based models to determine the surface shape of chips from scanning electronic microscopy images. Deducing some specific feature's vertical cross-section within an integrated circuit from two-dimensional top down scanning electron microscope images of the feature surface is a difficult "inverse problem" which arises in semiconductor fabrication. This paper refines our previous work on the reconstruction of semiconductor wafer surface shapes from top down electron microscopy images. One of the approaches we have developed directly maps from the CD-SEM intensity waveforms to line profiles. The other novel method we describe is based on an approximate physical model, where we assume a simplified mathematical representation of the physical process that produces the SEM image from the electron beam's interaction with the feature surface. Our results are illustrated with a variety of real data sets.

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“…[1][2][3][4] There are a few options in in-line shape monitoring: (a) multiple point analysis of waveforms; [1] (b) correlation of waveform/image to a template; [2] and (c) edge width monitoring. [3,4] However, they are indirect monitoring techniques and require extensive calibration work before using them.…”

Section: Introductionmentioning

confidence: 99%

Final CD control through slope/sidewall angle correlation with stepper defocus and electrical parametric

Campbell

Seregely

et al. 2001

SPIE Proceedings

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Traditionally, lithography critical dimension (CD) measurements with stepper de-focus and deltas in sidewall angle do not correlate well with the ultimate product measurement, namely electrical performance. It is important in etch bias control, therefore, to control more than just the physical CD. It is at a minimum, important to show how the changes in sidewall angle control at lithography relate to etch biases. This is especially important as chip geometries shrink, and the size and shape of the sidewall becomes a larger portion of the line width geometry. This makes precise CD measurements coupled with slope angle measurements, in real time, important to process control in lithography so that ultimately the desired dimension is achieved at the post etch step, and therefore electrical performance can be gauged. We will present data taken from Focus/Exposure Matrices (FEMs) in the form of CD measurements, in-line sidewall angle reconstruction, and electrical measurements. We hope to correlate electrical performance to post develop CD and slope sidewall angle as measured without destructive cross sections.

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Approach to CD-SEM metrology utilizing the full waveform signal

Cited by 14 publications

References 0 publications

Wafer surface reconstruction from top–down scanning electron microscope images

Wafer surface reconstruction from top–down scanning electron microscope images

<title>Evaluating neural network reconstruction of wafer profile from electron microscopy</title>

Final CD control through slope/sidewall angle correlation with stepper defocus and electrical parametric

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